HY5DU561622ALT-K HYNIX [Hynix Semiconductor], HY5DU561622ALT-K Datasheet - Page 28

• Manufacturer Part Number: HY5DU561622ALT-K
• Description: 256M-S DDR SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

Rev. 0.4/ May. 02
AC OPERATING CONDITIONS
Note :
1. VID is the magnitude of the difference between the input level on CK and the input on /CK.
2. The value of VIX is expected to equal 0.5*V DDQ of the transmitting device and must track variations in the DC level of the same.
AC OPERATING TEST CONDITIONS
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
Input Differential Voltage, CK and /CK inputs
Input Crossing Point Voltage, CK and /CK inputs
Reference Voltage
Termination Voltage
AC Input High Level Voltage (V
AC Input Low Level Voltage (V
Input Timing Measurement Reference Level Voltage
Output Timing Measurement Reference Level Voltage
Input Signal maximum peak swing
Input minimum Signal Slew Rate
Termination Resistor (R
Series Resistor (R
Output Load Capacitance for Access Time Measurement (C
S
)
Parameter
T
)
Parameter
IL
IH
, max)
, min)
(TA=0 to 70
(TA=0 to 70
o
C, Voltage referenced to V
L
)
Symbol
V
V
V
V
IH(AC)
ID(AC)
IX(AC)
IL(AC)
o
C, Voltage referenced to VSS = 0V)
0.5*V
V
REF
Min
0.7
DDQ
+ 0.31
V
V
V
V
-0.2
REF
DDQ
DDQ
REF
Value
SS
V
V
1.5
50
25
30
REF
+ 0.31
1
TT
- 0.31
= 0V)
x 0.5
x 0.5
0.5*V
V
V
DDQ
REF
Max
DDQ
- 0.31
+ 0.6
HY5DU56422A(L)T
HY5DU56822A(L)T
HY5DU561622A(L)T
+0.2
Unit
V
V
V
V
Unit
V/ns
pF
V
V
V
V
V
V
V
Note
1
2
28