HY5DU561622ALT-K HYNIX [Hynix Semiconductor], HY5DU561622ALT-K Datasheet - Page 30

• Manufacturer Part Number: HY5DU561622ALT-K
• Description: 256M-S DDR SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

Rev. 0.4/ May. 02
Input Setup Time (slow slew rate)
Input Hold Time (slow slew rate)
Input Pulse Width
Write DQS High Level Width
Write DQS Low Level Width
Clock to First Rising edge of DQS-In
Data-In Setup Time to DQS-In (DQ & DM)
Data-in Hold Time to DQS-In (DQ & DM)
DQ & DM Input Pulse Width
Read DQS Preamble Time
Read DQS Postamble Time
Write DQS Preamble Setup Time
Write DQS Preamble Hold Time
Write DQS Postamble Time
Mode Register Set Delay
Exit Self Refresh to Any Execute Command
Average Periodic Refresh Interval
Parameter
Symbol
t
t
t
t
t
t
t
WPRES
WPREH
t
t
t
t
DQSH
WPST
t
DQSL
DQSS
DIPW
t
RPRE
RPST
t
t
MRD
REFI
t
t
IPW
XSC
DS
DH
IS
IH
0.35
0.35
0.75
0.45
0.45
1.75
0.25
Min
200
0.8
0.8
2.2
0.9
0.4
0.4
0
2
-
DDR333
Max
1.25
1.1
0.6
0.6
7.8
-
-
-
-
-
-
-
-
-
-
-
-
0.35
0.35
0.25
Min
0.72
1.75
200
1.0
1.0
2.2
0.5
0.5
0.9
0.4
0.4
0
2
-
DDR266
HY5DU56422A(L)T
HY5DU56822A(L)T
HY5DU561622A(L)T
Max
1.28
1.1
0.6
0.6
7.8
-
-
-
-
-
-
-
-
-
-
-
-
Unit
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
ns
ns
ns
ns
ns
ns
us
2,4,5,6
6,7,11,
12,13
Note
30
8
6