DM8603EP DAVICOM [Davicom Semiconductor, Inc.], DM8603EP Datasheet - Page 87
DM8603EP
Manufacturer Part Number
DM8603EP
Description
10/100 Mbps 3-port Ethernet Switch Controller with MII / RMII Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
1.DM8603EP.pdf
(107 pages)
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9.3.2
physical layer through the MII interface. The serial control interface consists of PHY_MDC (Management
Data Clock to PHY), and PHY_MDIO (Management Data Input/Output to PHY) signals.
one bits (preamble) synchronization clock cycles on PHY_MDC. The Start of Frame Delimiter (SFD) is
indicated by a <01> pattern followed by the operation code (OP) :< 10> indicates Read operation and <01>
indicates Write operation. For read operation, a 2-bit turnaround (TA) filing between Register Address field
and Data field is provided for PHY_MDIO to avoid contention. Following the turnaround time, 16-bit data is
read from or written onto management registers.
Preliminary datasheet
DM8603-12-DS-P01
November 8, 2010
The serial control interface uses a simple two-wired serial interface to obtain and control the status of the
In read/write operation, the management data frame is 64-bits long and starts with 32 contiguous logic
MII Serial Management Interface
Management Interface - Read Frame Structure
Management Interface - Write Frame Structure
10/100 Mbps 3-port Ethernet Switch Controller with MII / RMII Interface
DM8603
87
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