MX29LV065TC-12 MCNIX [Macronix International], MX29LV065TC-12 Datasheet - Page 20

• Manufacturer Part Number: MX29LV065TC-12
• Description: 64M-BIT [8M x 8] CMOS EQUAL SECTOR FLASH MEMORY
• Manufacturer: MCNIX [Macronix International]

MX29LV065
This method is an alternative to that shown in Table 1,
which is intended for PROM programmers and requires
V
on address bit A9.
ID
The SILICON ID READ command sequence is initiated
by writing two unlock cycles, followed by the SILICON
ID READ command. The device then enters the SILICON
ID READ mode, and the system may read at any address
any number of times, without initiating another command
sequence. A read cycle at address XX00h retrieves the
manufacturer code. A read cycle at address XX01h
returns the device code. A read cycle containing a sector
address (SA) and the address 02h returns 01h if that
sector is protected, or 00h if it is unprotected. Refer to
Table for valid sector addresses.
The system must write the reset command to exit the
auto-select mode and return to reading array data.
BYTE PROGRAM COMMAND SEQUENCE
The command sequence requires four bus cycles, and
is initiated by writing two unlock write cycles, followed
by the program set-up command. The program address
and data are written next, which in turn initiate the
Embedded Program algorithm. The system is
not
required
to provide further controls or timings. The device
automatically generates the program pulses and verifies
the programmed cell margin. Table 1 shows the address
and data requirements for the byte program command
sequence.
When the Embedded Program algorithm is complete, the
device then returns to reading array data and addresses
are no longer latched. The system can determine the
status of the program operation by using
Q7, Q6, or RY/BY. See "Write Operation Status" for
information on these status bits.
Any commands written to the device during the
Embedded Program Algorithm are ignored. Note that a
hardware reset immediately terminates the programming
operation. The Byte Program command sequence should
be reinitiated once the device has reset to reading array
data, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries. A bit cannot be programmed from a
"0" back to a "1". Attempting to do so may halt the
operation and set Q5 to "1" ,” or cause the Data Polling
algorithm to indicate the operation was successful.
However, a succeeding read will show that the data is
still "0". Only erase operations can convert a "0" to a
"1".
P/N:PM0893
REV. 0.4, JUL. 22, 2003
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