HD66108T00 HITACHI [Hitachi Semiconductor], HD66108T00 Datasheet - Page 47

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HD66108T00

Manufacturer Part Number
HD66108T00
Description
(RAM-Provided 165-Channel LCD Driver for Liquid Crystal Dot Matrix Graphics)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
HD66108
6. Mode Register (MDR) (Accessed with RS = 1, Register Number = (B’100)
This register (Figure 32), containing 3 invalid bits (D7 to D5) and 5 valid bits (D4 to D0), selects a
system clock and type of LCD driving waveform. It must also be initialized after power-on since it
determines overall HD66108T operation like the FCR register. If the FFS bits are rewritten after
initialization at power-on (if values other than the initial values are desired), the display memory will not
preserve data; the display memory must be set again after a time period of t
t
1000
CL1
, refer to equation 1 in section 3.1).
(1) FFS (frame frequency select)
(2) DWS (LCD driving waveform select)
D7
No.
0
1
2
3
4
5
6
7
No.
0
1
2
3
D6
Figure 32 Mode Register
4 3
0
0
0
0
1
1
1
1
1 0
0
0
1
1
Bit
Bit
0
0
1
1
0
0
1
1
0
1
0
1
D5
2
0
1
0
1
0
1
0
1
Driving Waveform
A-type waveform
B-type waveform
C-type waveform
D4
Frequency-
Division Ratio
1
1/2
1/3
1/4
1/6
1/8
2
FFS
D3
D2
D1
DWS
D0
CL1
or longer. For determining

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