IC62LV256L ICSI [Integrated Circuit Solution Inc], IC62LV256L Datasheet - Page 3

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IC62LV256L

Manufacturer Part Number
IC62LV256L
Description
32K x 8 Low Power SRAM with 3.3V
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
IC62LV256L
PIN CONFIGURATION
28-Pin SOJ
Integrated Circuit Solution Inc.
ALSR008-0A 10/5/2001
PIN DESCRIPTIONS
ABSOLUTE MAXIMUM RATINGS
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
A0-A14
CE
OE
WE
I/O0-I/O7
Vcc
GND
Symbol
V
T
T
P
I
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
OUT
BIAS
STG
TERM
T
GND
I/O0
I/O1
I/O2
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current (LOW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Chip Enable Input
Output Enable Input
Write Enable Input
Input/Output
Power
Ground
Address Inputs
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
TRUTH TABLE
(1)
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
PIN CONFIGURATION
8x13.4mm TSOP-1
VCC
A11
A13
A14
A12
WE
OE
A9
A8
A7
A6
A5
A4
A3
–0.5 to +4.6
–55 to +125
–65 to +150
22
23
24
25
26
27
28
1
2
3
4
5
6
7
Value
0.5
20
WE
WE
WE
WE
WE
X
H
H
L
CE
CE
CE
CE
CE
H
L
L
L
Unit
mA
°C
°C
W
V
OE
OE
OE
OE
OE
X
H
X
L
I/O Operation
High-Z
High-Z
D
D
OUT
IN
Vcc Current
I
I
I
I
CC
CC
CC
SB
21
20
19
18
17
16
15
14
13
12
11
10
9
8
1
1
1
1
, I
, I
, I
, I
SB
CC
CC
CC
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
2
2
2
2
3

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