P4C1049 PYRAMID [Pyramid Semiconductor Corporation], P4C1049 Datasheet
P4C1049
Related parts for P4C1049
P4C1049 Summary of contents
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... RAM operates from a single 5V±10% tolerance power supply. Access times as fast as 15 nanoseconds permit greatly enhanced system operating speeds. CMOS is utilized to reduce power consumption to a low level. The P4C1049 is a member of a family of PACE RAM™ products offer- ing fast access times. FUNCTIONAL BLOCK DIAGRAM ...
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... Parameter Value Temperature Under –55 to +125 Bias Storage Temperature –65 to +150 Power Dissipation 1.0 DC Output Current 50 (4) = 25° 1.0MHz A Parameter Conditions Typ. Input Capacitance Output Capacitance OUT P4C1049 P4C1049L Min Max Min Max V +0.3 2.2 2 0.8 0.8 –0.3 –0.3 (3) (3) V –0.2 V –0 ...
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... DATA RETENTION CHARACTERISTICS (P4C1049L Military Temperature Only) Symbol Parameter V V for Data Retention Data Retention Current CCDR t Chip Deselect to CDR Data Retention Time t Operation Recovery Time † +25°C A §t = Read Cycle Time RC This parameter is guaranteed but not tested. † ...
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... P4C1049 AC ELECTRICAL CHARACTERISTICS—READ CYCLE ( ± 10%, All Temperature Ranges) CC Sym. Parameter t Read Cycle Time RC t Address Access Time AA t Chip Enable Access Time AC Output Hold from Address t OH Change t Chip Enable to Output in LZ Low Z t Chip Disable to Output in HZ High Z ...
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... ADDRESS must be valid prior to, or coincident with CE transition LOW. 8. Transition is measured ± 200 mV from steady state voltage prior to change, with loading as specified in Figure 1. This parameter is sampled and not 100% tested. 9. Read Cycle Time is measured from the last valid address to the first transitioning address. P4C1049 Page ...
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... P4C1049 AC CHARACTERISTICS—WRITE CYCLE ( ± 10%, All Temperature Ranges) CC Parameter Sym. t Write Cycle Time WC t Chip Enable Time to End of CW Write t Address Valid to End of AW Write t Address Set-up Time AS t Write Pulse Width WP t Address Hold Time AH t Data Valid to End of Write ...
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... OE is LOW for this WRITE cycle to show t 12 goes HIGH simultaneously with WE HIGH, the output remains Document # SRAM128 REV CONTROLLED high impedance state and t . 13. Write Cycle Time is measured from the last valid address to the first WZ OW transitioning address. P4C1049 (10) Page ...
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... Figure 1. Output Load * including scope and test fixture. Note: Because of the ultra-high speed of the P4C1049, care must be taken when testing this device; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the V ground planes directly up to the contactor fingers. A 0.01 µ ...
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... ORDERING INFORMATION Document # SRAM128 REV OR P4C1049 Page ...
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... P4C1049 SOLDER SEAL FLATPACK FS-4 Pkg # # Pins 36 Symbol Min Max A 0.089 0.125 b 0.015 0.019 c 0.003 0.007 D 0.910 0.930 E 0.505 0.515 E1 - 0.530 E2 0.385 0.395 E3 0.055 0.065 e 0.050 BSC L 0.300 0.350 Q 0.015 0.038 S - 0.045 M - 0.0015 N 36 SOJ SMALL OUTLINE IC PACKAGE Pkg # J9 # Pins 36 Symbol Min ...
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... RECTANGULAR LEADLESS CHIP CARRIER L11 Pkg # # Pins 36 Symbol Min Max A 0.080 0.100 A1 0.054 0.066 B 0.022 0.028 D 0.910 0.930 D1 0.840 0.860 E 0.445 0.460 e .050 BSC L .100 TYP L2 0.115 0.135 P - 0.006 R .009 TYP Document # SRAM128 REV OR P4C1049 Page ...
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... P4C1049 REVISIONS DOCUMENT NUMBER: SRAM128 DOCUMENT TITLE: P4C1049 / P4C1049L HIGH SPEED 512K x 8 STATIC CMOS RAM ORIG. OF ISSUE REV. DATE CHANGE OR Oct-05 JDB Document # SRAM128 REV OR DESCRIPTION OF CHANGE New Data Sheet Page ...