P4C1049 PYRAMID [Pyramid Semiconductor Corporation], P4C1049 Datasheet - Page 5

• Manufacturer Part Number: P4C1049
• Description: HIGH SPEED 512K x 8 STATIC CMOS RAM
• Manufacturer: PYRAMID [Pyramid Semiconductor Corporation]

TIMING WAVEFORM OF READ CYCLE NO. 2 (ADDRESS CONTROLLED)
TIMING WAVEFORM OF READ CYCLE NO. 3 (CE
Document # SRAM128 REV OR
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may
2. Extended temperature operation guaranteed with 400 linear feet per
3. Transient inputs with V
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
minute of air flow.
–100mA, respectively, are permissible for pulse widths up to 20 ns.
IL
and I
IL
not more negative than –2.0V and
CE
CE
CE
CE CONTROLLED)
4. This parameter is sampled and not 100% tested.
5. WE is HIGH for READ cycle.
6. CE is LOW and OE is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with CE transition LOW.
8. Transition is measured ± 200 mV from steady state voltage prior to
9. Read Cycle Time is measured from the last valid address to the first
change, with loading as specified in Figure 1. This parameter is
sampled and not 100% tested.
transitioning address.
(5,7)
(5,6)
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P4C1049