CH7013A-T ETC1 [List of Unclassifed Manufacturers], CH7013A-T Datasheet - Page 40

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CH7013A-T

Manufacturer Part Number
CH7013A-T
Description
Digital PC to TV Encoder
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet

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CHRONTEL
Register Descriptions (continued)
PLL Control Register
The following PLL and memory controls are available through the PLL control register:
MEM5V
PLL5VA
PLL5VD
PLLS
PLLCAP
PLLCPI
40
Bit:
Symbol:
Type:
Default:
7
MEM5V is set to 1 when the memory supply is 5 volts. The default value of 0 is used when the
memory supply is 3.3 volts.
PLL5VA is set to 1 when the phase-locked loop analog supply is 5 volts (default). A value of 0 is
used when the phase-locked loop analog supply is 3.3 volts.
PLL5VD is set to 1 when the phase-locked loop digital supply is 5 volts. A value of 0 is used when
the phase-locked loop digital supply is 3.3 volts (default).
PLLS controls the number of stages used in the PLL. When the PLL5VA is 1 (5V analog PLL
supply) PLLS should be 1, and seven stages are used. When PLL5VA is 0 (3.3V analog PLL
supply) PLLS should be 0, and five stages are used.
PLLCAP controls the loop filter capacitor of the PLL. A recommended listing of PLLCAP vs.
Mode is shown below
PLLCHI controls the charge pump current of the PLL. The default value should be used.
6
5
PLLCPI
R/W
0
4
PLLCAP
R/W
0
3
PLLS
R/W
1
201-0000-041
2
PLL5VD
0
R/W
Symbol: PLLC
Address: 20H
Bits: 6
1
PLL5VA
R/W
1
Rev. 1.0,
CH7013A
0
MEM5V
R/W
0
6/14/2000

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