P4C167 PYRAMID [Pyramid Semiconductor Corporation], P4C167 Datasheet - Page 6

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P4C167

Manufacturer Part Number
P4C167
Description
ULTRA HIGH SPEED 16K X 1 STATIC CMOS RAMS
Manufacturer
PYRAMID [Pyramid Semiconductor Corporation]
Datasheet
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE
AC TEST CONDITIONS
* including scope and test fixture.
Note:
Due to the ultra-high speed of the P4C167/L, care must be taken when
testing this device; an inadequate setup can cause a normal functioning
part to be rejected as faulty. Long high-inductance leads that cause
supply bounce must be avoided by bringing the V
directly up to the contactor fingers. A 0.01 µF high frequency capacitor
is also required between V
Document # SRAM106 REV A
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Level
Output Timing Reference Level
Output Load
P4C167
Figure 1. Output Load
CC
and ground. To avoid signal reflections,
See Figures 1 and 2
GND to 3.0V
CC
and ground planes
1.5V
1.5V
3ns
CE
CE
CE
CE CONTROLLED)
TRUTH TABLE
proper termination must be used; for example, a 50 test environment
should be terminated into a 50 load with 1.73V (Thevenin Voltage) at
the comparator input, and a 116
D
Mode
Standby
Read
Write
OUT
to match 166
Figure 2. Thevenin Equivalent
CE
CE
CE
CE
CE
H
L
L
(Thevenin Resistance).
(9)
WE
WE
WE
WE
WE
H
X
L
resistor must be used in series with
Output
High Z
High Z
D
OUT
Page 6 of 10
Power
Standby
Active
Active

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