EX256-CS100A ACTEL [Actel Corporation], EX256-CS100A Datasheet - Page 27

• Manufacturer Part Number: EX256-CS100A
• Description: eX Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Table 1-18 • eX Family Timing Characteristics
Parameter
Dedicated (Hard-Wired) Array Clock Networks
t
t
t
t
t
t
f
Routed Array Clock Networks
t
t
t
t
t
t
t
t
t
t
t
Note: *Clock skew improves as the clock network becomes more heavily loaded.
HCKH
HCKL
HPWH
HPWL
HCKSW
HP
HMAX
RCKH
RCKL
RCKH
RCKL
RCKH
RCKL
RPWH
RPWL
RCKSW
RCKSW
RCKSW
*
*
*
(Worst-Case Commercial Conditions V
Description
Input LOW to HIGH
(Pad to R-Cell Input)
Input HIGH to LOW
(Pad to R-Cell Input)
Minimum Pulse Width HIGH
Minimum Pulse Width LOW
Maximum Skew
Minimum Period
Maximum Frequency
Input LOW to HIGH (Light Load)
(Pad to R-Cell Input) MAX.
Input HIGH to LOW (Light Load)
(Pad to R-Cell Input) MAX.
Input LOW to HIGH (50% Load)
(Pad to R-Cell Input) MAX.
Input HIGH to LOW (50% Load)
(Pad to R-Cell Input) MAX.
Input LOW to HIGH (100% Load)
(Pad to R-Cell Input) MAX.
Input HIGH to LOW (100% Load)
(Pad to R-Cell Input) MAX.
Min. Pulse Width HIGH
Min. Pulse Width LOW
Maximum Skew (Light Load)
Maximum Skew (50% Load)
Maximum Skew (100% Load)
CCA
= 2.3 V, V
v4.3
Min.
1.4
1.4
2.8
1.5
1.5
‘–P’ Speed
CCI
= 4.75 V, T
Max.
<0.1
357
1.1
1.1
1.1
1.0
1.2
1.2
1.3
1.3
0.2
0.1
0.1
J
= 70°C)
Min.
‘Std’ Speed
2.0
2.0
4.0
2.1
2.1
Max.
<0.1
250
1.6
1.6
1.6
1.4
1.7
1.7
1.9
1.9
0.3
0.2
0.1
Min.
2.8
2.8
5.6
3.0
3.0
‘–F’ Speed
eX Family FPGAs
Max.
<0.1
178
2.3
2.3
2.2
2.0
2.4
2.4
2.6
2.6
0.4
0.3
0.2
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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