IS61LV256-15JL-TR ISSI, IS61LV256-15JL-TR Datasheet
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IS61LV256-15JL-TR
Related parts for IS61LV256-15JL-TR
IS61LV256-15JL-TR Summary of contents
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... CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS61LV256 is available in the JEDEC standard 28-pin, 300-mil SOJ and the 450-mil TSOP (Type I) packages. DECODER I/O ...
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... IS61LV256 PIN CONFIGURATION 28-Pin SOJ A14 1 28 VDD WE A12 A13 A11 A10 I/O7 I/ I/O6 I/ I/O5 I/ I/O4 GND 14 15 I/O3 PIN DESCRIPTIONS A0-A14 Address Inputs CE Chip Enable Input OE Output Enable Input ...
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... IS61LV256 OPERATING RANGE Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH (1) V Input LOW Voltage IL I Input Leakage LI I Output Leakage LO Notes (min.) = – ...
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... IS61LV256 READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CE Access Time t ACE OE Access Time t DOE OE to Low-Z Output t (2) LZOE OE to High-Z Output t (2) HZOE CE to Low-Z Output t (2) LZCE CE to High-Z Output ...
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... IS61LV256 AC WAVEFORMS (1,2) READ CYCLE NO. 1 ADDRESS D OUT PREVIOUS DATA VALID (1,3) READ CYCLE NO. 2 ADDRESS LZCE HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE Address is valid prior to or coincident with CE LOW transitions. Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev ...
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... IS61LV256 WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time AW to Write End t Address Hold HA from Write End t Address Setup Time SA WE Pulse Width (OE HIGH) 6 PWE WE Pulse Width (OE LOW PWE t Data Setup to Write End ...
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... IS61LV256 (WE Controlled HIGH During Write Cycle) WRITE CYCLE NO. 2 ADDRESS OE CE LOW DATA UNDEFINED OUT D IN WRITE CYCLE NO. 3 (WE Controlled LOW During Write Cycle) ADDRESS OE LOW CE LOW DATA UNDEFINED OUT D IN Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write ...
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... TSOP - Type I, Lead free IS61LV256-15J 300-mil Plastic SOJ IS61LV256-15JL 300-mil Plastic SOJ, Lead free ORDERING INFORMATION Industrial Range: –40°C to +85°C Speed (ns) Order Part No. Package 10 IS61LV256-10TI TSOP - Type I IS61LV256-10JI 300-mil Plastic SOJ 12 IS61LV256-12TI TSOP - Type I IS61LV256-12TLI TSOP - Type I, Lead-free IS61LV256-12JI 300-mil Plastic SOJ ...
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... BSC Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — ...
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... B — 0.010 C — 0.730 D 20.83 — 0.345 E — 0.305 E1 — 0.287 E2 e Integrated Silicon Solution, Inc. — www.issi.com — ISSI MILLIMETERS INCHES Min. Typ. Max. 32 — — 3.56 — — 0.140 0.64 — — 0.025 — 2.41 — 2.67 0.095 — 0.105 0.41 — ...
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... Dimensions D and E do not include mold flash protrusions and should be measured from the bottom of the package 0.006 0.011 4. Formed leads shall be planar with respect to one another within 0.004 0.008 0.004 inches at the seating plane. 0.308 0.316 0.456 0.465 0.515 0.531 0.022 BSC 0.011 0.027 0 5 ISSI ® 1 ...