ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 63
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 63 of 97
- Download datasheet (2Mb)
4679D–4BMCU–05/05
Deactivating the SSI (SIR = 1) in mid-telegram will immediately stop the shift clock and latch the
present contents of the shift register into the receive buffer. This can be used for clocking in a
data telegram of less than 8 bits in length. Care should be taken to read out the final complete
8-bit data telegram of a multiple word message before deactivating the SSI (SIR = 1) and termi-
nating the reception. After termination, the shift register contents will overwrite the receive
buffer.
Figure 6-40. Example of an 8-bit Synchronous Transmit Operation
Figure 6-41. Example of an 8-bit Synchronous Receive Operation
(IFN = 0)
(IFN = 1)
Interrupt
Interrupt
SRDY
ACT
SIR
SC
SD
(IFN = 0)
(IFN = 1)
Interrupt
Interrupt
SRDY
ACT
SIR
SD
SC
msb
7 6 5
rx data 1
Write STB
(tx data 1)
4 3 2 1 0
msb
7 6 5 4 3 2 1
lsb
tx data 1
msb
7 6 5
lsb
rx data 2
0
4 3 2 1 0
Write STB
(tx data 2)
lsb
msb
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1
Write STB
(tx data 3)
tx data 2
Read SRB
(rx data 1)
lsb msb
msb
7 6 5 4 3 2 1 0
Read SRB
(rx data 2)
rx data 3
tx data 3
lsb
lsb
ATAM894
Read SRB
(rx data 3)
0
7 6 5 4
63
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