CY7C4292V-15ASCT Cypress Semiconductor, CY7C4292V-15ASCT Datasheet - Page 13

• Manufacturer Part Number: CY7C4292V-15ASCT
• Manufacturer: Cypress Semiconductor

Document #: 38-06014 Rev. *B
Switching Waveforms
Notes:
27. Clocks are free-running in this case.
28. The flags may change state during Retransmit as a result of the offset of the read and write pointers, but flags will be valid at t
29. For the synchronous PAE and PAF flags an appropriate clock cycle is necessary after t
Write Programmable Registers
Read Programmable Registers
Retransmit Timing
REN/WEN
Q
REN
WEN
D
WCLK
0
FL/RT
RCLK
LD
EF/FF
0
–Q
–D
LD
15
8
t
t
CLKH
CLKH
[27, 28, 29]
(continued)
t
t
CLK
CLK
t
t
t
t
ENS
ENS
ENS
ENS
t
DS
PAE OFFSET
LSB
UNKNOWN
t
t
CLKL
CLKL
t
t
ENH
ENH
t
DH
t
A
PAE OFFSET
MSB
PAE OFFSET LSB
RTR
t
PRT
to update these flags.
PAF OFFSET
LSB
PAE OFFSET MSB
t
RTR
PAF OFFSET
RTR
MSB
.
CY7C4282V
CY7C4292V
PAF OFFSET
PAF OFFSET
LSB
Page 13 of 15
MSB
[+] Feedback