LFE2-6E-5TN144CES Lattice Semiconductor, LFE2-6E-5TN144CES Datasheet - Page 71
LFE2-6E-5TN144CES
Manufacturer Part Number
LFE2-6E-5TN144CES
Description
Semiconductors and Actives, programmable, Programmable Logic (FPGAs, PALs, CPLDs ...), gate
Manufacturer
Lattice Semiconductor
Datasheet
1.LFE26E5TN144C.pdf
(385 pages)
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LatticeECP2/M External Switching Characteristics
t
t
f
General I/O Pin Parameters (using Edge Clock without PLL)
t
Lattice Semiconductor
SU_DEL
H_DEL
MAX_IO
COE
Parameter
Clock to Data Setup - PIO Input
Register with Data Input Delay
Clock to Data Hold - PIO Input Reg-
ister with Input Data Delay
Clock Frequency of I/O Register and
PFU Register
Clock to Output - PIO Output
Register
Description
Over Recommended Operating Conditions
LFE2-6
LFE2-12
LFE2-20
LFE2-35
LFE2-50
LFE2-70
LFE2M20
LFE2M35
LFE2M50
LFE2M70
LFE2M100
LFE2-6
LFE2-12
LFE2-20
LFE2-35
LFE2-50
LFE2-70
LFE2M20
LFE2M35
LFE2M50
LFE2M70
LFE2M100
ECP2/M
LFE2-6
LFE2-12
LFE2-20
LFE2-35
LFE2-50
LFE2-70
LFE2M20
LFE2M35
LFE2M50
LFE2M70
LFE2M100
Device
3-20
1
Min.
1.40
1.40
1.40
1.40
1.40
1.40
1.40
1.40
1.40
1.40
1.40
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
—
—
—
—
—
—
—
—
—
—
—
—
-7
Max.
2.60
2.60
2.60
2.60
2.60
2.60
2.60
2.60
3.10
3.10
3.10
420
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
9
Min.
1.70
1.70
1.70
1.70
1.70
1.70
1.70
1.70
1.70
1.70
1.70
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
(Continued)
—
—
—
—
—
—
—
—
—
—
—
—
-6
Max.
2.90
2.90
2.90
2.90
2.90
2.90
2.90
2.90
3.40
3.40
3.40
357
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Min.
1.90
1.90
1.90
1.90
1.90
1.90
1.90
1.90
1.90
1.90
1.90
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
—
—
—
—
—
—
—
—
—
—
—
—
-5
Max.
3.20
3.20
3.20
3.20
3.20
3.20
3.20
3.20
3.70
3.70
3.70
311
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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