SSTUA32864EC/G,518 NXP Semiconductors, SSTUA32864EC/G,518 Datasheet - Page 12

• Manufacturer Part Number: SSTUA32864EC/G,518
• Description: IC REG BUFFER 25BIT 96-LFBGA
• Manufacturer: NXP Semiconductors

Specifications of SSTUA32864EC/G,518

• Logic Type: 1:1, 1:2 Configurable Registered Buffer
• Supply Voltage: 1.7 V ~ 2 V
• Number Of Bits: 25, 14
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 96-LFBGA
• Logic Family: SSTU
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Inputs: 25
• Number Of Outputs: 25
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Package Type: LFBGA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 2V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 450(Min)MHz
• Mounting: Surface Mount
• Pin Count: 96
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3538-2; 935279443518; SSTUA32864EC/G-T

NXP Semiconductors
SSTUA32864_2
Product data sheet
Fig 9. Voltage waveforms; setup and hold times
Fig 10. Voltage waveforms; propagation delay times (clock to output)
Fig 11. Voltage waveforms; propagation delay times (reset to output)
V
V
V
V
t
t
V
V
PLH
PLH
ID
ref
IH
IL
IH
IL
= V
= V
= 600 mV
= V
= V
= 0.5V
and t
and t
ref
ref
1.8 V configurable registered buffer for DDR2-667 RDIMM applications
ref
ref
PHL
PHL
+ 250 mV (AC voltage levels) for differential inputs. V
+ 250 mV (AC voltage levels) for differential inputs. V
DD
250 mV (AC voltage levels) for differential inputs. V
250 mV (AC voltage levels) for differential inputs. V
are the same as t
are the same as t
input
CK
CK
Rev. 02 — 9 March 2007
output
RESET
output
CK
CK
LVCMOS
V
t
V
PLH
ref
PD
PD
ICR
.
.
t
su
0.5V
V
t
PHL
ICR
DD
t
h
V
t
V
V
PHL
T
ICR
T
002aaa376
IL
IL
IH
IH
002aaa374
= GND for LVCMOS inputs.
= GND for LVCMOS inputs.
V
= V
= V
V
ref
V
V
V
V
SSTUA32864
002aaa375
ID
V
IH
IL
OH
OL
DD
DD
i(p-p)
V
V
for LVCMOS inputs.
for LVCMOS inputs.
OH
OL
V
V
IH
IL
© NXP B.V. 2007. All rights reserved.
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