S9S12G96F0CLL Freescale Semiconductor, S9S12G96F0CLL Datasheet - Page 1183
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S9S12G96F0CLL
Manufacturer Part Number
S9S12G96F0CLL
Description
16-bit Microcontrollers - MCU 16BIT 96K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G96F0CLL
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
96 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G96F0CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Upon clearing CCIF to launch the Erase EEPROM Sector command, the Memory Controller will erase the
selected Flash sector and verify that it is erased. The CCIF flag will set after the Erase EEPROM Sector
operation has completed.
31.4.7
The Flash module can generate an interrupt when a Flash command operation has completed or when a
Flash command operation has detected an ECC fault.
Freescale Semiconductor
Register
FSTAT
Flash Command Complete
ECC Double Bit Fault on Flash Read
ECC Single Bit Fault on Flash Read
Interrupts
Interrupt Source
Table 31-64. Erase EEPROM Sector Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
Table 31-65. Erase EEPROM Sector Command Error Handling
ACCERR
Error Bit
000
001
FPVIOL
MC9S12G Family Reference Manual, Rev.1.23
Global address [15:0] anywhere within the sector to be erased.
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:0] is suppliedsee
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the selected area of the EEPROM memory is protected
Set if any errors have been encountered during the verify operation
Set if any non-correctable errors have been encountered during the verify
operation
Table 31-66. Flash Interrupt Sources
See
0x12
(FERSTAT register)
(FERSTAT register)
Section 31.1.2.2
(FSTAT register)
Interrupt Flag
DFDIF
SFDIF
CCIF
FCCOB Parameters
for EEPROM sector size.
Global address [17:16] to identify
Error Condition
(FERCNFG register)
(FERCNFG register)
(FCNFG register)
EEPROM block
Local Enable
240 KByte Flash Module (S12FTMRG240K2V1)
DFDIE
SFDIE
CCIE
Table
Table
31-27)
31-3)
Global (CCR)
Mask
I Bit
I Bit
I Bit
1185
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