74AUP1T98GW,125 NXP Semiconductors, 74AUP1T98GW,125 Datasheet - Page 13

IC LP CONFIG GATE V-XLATR UMT6

74AUP1T98GW,125

Manufacturer Part Number
74AUP1T98GW,125
Description
IC LP CONFIG GATE V-XLATR UMT6
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1T98GW,125

Package / Case
SC-70-6, SC-88, SOT-363
Logic Function
Translator
Number Of Bits
3
Input Type
Voltage
Output Type
Voltage
Number Of Channels
3
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.8ns
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Supply Voltage
2.3 V ~ 3.6 V
Logic Family
74AUP
Translation
CMOS to CMOS
Propagation Delay Time
6.8 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Maximum Power Dissipation
250 mW
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4753-2
74AUP1T98GW,125
74AUP1T98GW-G
74AUP1T98GW-G
935280471125
NXP Semiconductors
Fig 15. Package outline SOT886 (XSON6)
74AUP1T98
Product data sheet
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
VERSION
OUTLINE
SOT886
max
A
0.5
(1)
max
0.04
A
terminal 1
index area
1
e
0.25
0.17
b
(2)
L
1
IEC
1.5
1.4
D
1.05
0.95
1
6
E
0
e
MO-252
JEDEC
1
0.6
All information provided in this document is subject to legal disclaimers.
e
REFERENCES
D
0.5
2
5
e
1
Rev. 2 — 19 October 2010
e
0.35
0.27
1
L
Low-power configurable gate with voltage-level translator
JEITA
b
0.40
0.32
scale
L
3
4
1
1
A
L
1
E
A
(2)
2 mm
PROJECTION
EUROPEAN
74AUP1T98
© NXP B.V. 2010. All rights reserved.
ISSUE DATE
04-07-15
04-07-22
SOT886
13 of 20

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