74AUP1T98GW,125 NXP Semiconductors, 74AUP1T98GW,125 Datasheet - Page 15

IC LP CONFIG GATE V-XLATR UMT6

74AUP1T98GW,125

Manufacturer Part Number
74AUP1T98GW,125
Description
IC LP CONFIG GATE V-XLATR UMT6
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1T98GW,125

Package / Case
SC-70-6, SC-88, SOT-363
Logic Function
Translator
Number Of Bits
3
Input Type
Voltage
Output Type
Voltage
Number Of Channels
3
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.8ns
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Supply Voltage
2.3 V ~ 3.6 V
Logic Family
74AUP
Translation
CMOS to CMOS
Propagation Delay Time
6.8 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Maximum Power Dissipation
250 mW
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4753-2
74AUP1T98GW,125
74AUP1T98GW-G
74AUP1T98GW-G
935280471125
NXP Semiconductors
Fig 17. Package outline SOT1115 (XSON6)
74AUP1T98
Product data sheet
XSON6: extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1115
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
0.95
0.90
0.85
terminal 1
index area
D
e
(6×)
1.05
1.00
0.95
L
(2)
E
1
0.55
JEDEC
e
All information provided in this document is subject to legal disclaimers.
1
6
0.3
e
e
1
1
References
D
Rev. 2 — 19 October 2010
2
5
0.35
0.30
0.27
0
L
e
1
0.40
0.35
0.32
Low-power configurable gate with voltage-level translator
L
b
3
4
1
JEITA
scale
0.5
A
L
E
1
A
1 mm
(4×)
(2)
European
projection
74AUP1T98
© NXP B.V. 2010. All rights reserved.
Issue date
10-04-02
10-04-07
sot1115_po
SOT1115
15 of 20

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