MK20DX128VMP5 Freescale Semiconductor, MK20DX128VMP5 Datasheet - Page 52

• Manufacturer Part Number: MK20DX128VMP5
• Description: ARM Microcontrollers - MCU KINETIS 128K FLEX
• Manufacturer: Freescale Semiconductor

Specifications of MK20DX128VMP5

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: Kinetis K20
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: MAPBGA-64
• Mounting Style: SMD/SMT

Peripheral operating requirements and behaviors
6.8.8.2 VLPR, VLPW, and VLPS mode performance over the full operating
This section provides the operating performance over the full operating voltage for the
device in VLPR, VLPW, and VLPS modes.
52
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
I2S_TX_BCLK/
I2S_RX_BCLK (input)
I2S_TX_FS/
I2S_RX_FS (output)
I2S_TX_FS/
I2S_RX_FS (input)
I2S_TXD
I2S_RXD
Num.
Table 38. I2S/SAI master mode timing in VLPR, VLPW, and VLPS modes
voltage range
Operating voltage
I2S_MCLK cycle time
I2S_MCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK cycle time (output)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output valid
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output invalid
I2S_TX_BCLK to I2S_TXD valid
I2S_TX_BCLK to I2S_TXD invalid
I2S_RXD/I2S_RX_FS input setup before
I2S_RX_BCLK
I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK
(full voltage range)
S15
S15
Figure 20. I2S/SAI timing — slave modes
S12
Characteristic
S19
S13
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
S17
S11
S18
S12
S16
1.71
62.5
45%
250
45%
—
0
—
0
45
0
S15
Min.
3.6
—
55%
—
55%
45
—
45
—
—
—
Max.
Freescale Semiconductor, Inc.
V
ns
MCLK period
ns
BCLK period
ns
ns
ns
ns
ns
ns
S14
Unit
S16
S16