74AUP1T45GF,132 NXP Semiconductors, 74AUP1T45GF,132 Datasheet - Page 27

no-image

74AUP1T45GF,132

Manufacturer Part Number
74AUP1T45GF,132
Description
Bus Transceivers 3.6V 250mW 31.2ns
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP1T45GF,132

Rohs
yes
Propagation Delay Time
31.2 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.1 V
Maximum Operating Temperature
+ 125 C
Package / Case
XSON-6
Maximum Power Dissipation
250 mW
Mounting Style
SMD/SMT
Factory Pack Quantity
5000
NXP Semiconductors
74AUP1T45
Product data sheet
13.3 Power-up considerations
13.4 Enable times
A proper power-up sequence always should be followed to avoid excessive supply
current, bus contention, oscillations, or other anomalies. Take the following precautions to
guard against such power-up problems:
Calculate the enable times for the 74AUP1T45 using the following formulas:
In a bidirectional application, these enable times provide the maximum delay from the
time the DIR bit is switched until an output is expected. For example, if the 74AUP1T45
initially is transmitting from A to B, then the DIR bit is switched, the B port of the device
must be disabled before presenting it with an input. After the B port has been disabled, an
input signal applied to it appears on the corresponding A port after the specified
propagation delay.
Connect ground before any supply voltage is applied.
Power-up V
V
t
t
t
t
PZH
PZL
PZH
PZL
CC(B)
(DIR to A) = t
(DIR to B) = t
(DIR to A) = t
(DIR to B) = t
can be ramped up along with or after V
All information provided in this document is subject to legal disclaimers.
CC(A)
.
PHZ
PHZ
PLZ
PLZ
Rev. 5 — 9 August 2012
(DIR to B) + t
(DIR to B) + t
(DIR to A) + t
(DIR to A) + t
Low-power dual supply translating transceiver; 3-state
PLH
PHL
PLH
PHL
(B to A)
(B to A)
(A to B)
(A to B)
CC(A)
.
74AUP1T45
© NXP B.V. 2012. All rights reserved.
27 of 36

Related parts for 74AUP1T45GF,132