M24C32-FMB5TG STMicroelectronics, M24C32-FMB5TG Datasheet - Page 21

• Manufacturer Part Number: M24C32-FMB5TG
• Description: EEPROM 32Kbit 100kHz I2C 400 kHZ Fast-Mode
• Manufacturer: STMicroelectronics

Specifications of M24C32-FMB5TG

• Product Category: EEPROM
• Rohs: yes
• Memory Size: 32 Kbit
• Organization: 4 K x 8
• Data Retention: 40 yr
• Maximum Clock Frequency: 0.4 MHz
• Maximum Operating Current: 3 mA
• Operating Supply Voltage: 1.8 V , 2.5 V , 3.3 V , 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: UFDFPN
• Access Time: 900 ns
• Interface Type: I2C
• Minimum Operating Temperature: - 20 C
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 1.7 V

M24C32-W M24C32-R M24C32-F M24C32-X M24C32-DF
5.2.2
5.2.3
5.3
5.4
Current Address Read
For the Current Address Read operation, following a Start condition, the bus master only
sends a device select code with the R/W bit set to 1. The device acknowledges this, and
outputs the byte addressed by the internal address counter. The counter is then
incremented. The bus master terminates the transfer with a Stop condition, as shown in
Figure
Sequential Read
This operation can be used after a Current Address Read or a Random Address Read. The
bus master does acknowledge the data byte output, and sends additional clock pulses so
that the device continues to output the next byte in sequence. To terminate the stream of
bytes, the bus master must not acknowledge the last byte, and must generate a Stop
condition, as shown in
The output data comes from consecutive addresses, with the internal address counter
automatically incremented after each byte output. After the last memory address, the
address counter “rolls-over”, and the device continues to output data from memory address
00h.
Read Identification Page (M24C32-D only)
The Identification Page (32 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode.
The Identification Page can be read by issuing an Read Identification Page instruction. This
instruction uses the same protocol and format as the Random Address Read (from memory
array) with device type identifier defined as 1011b. The MSB address bits A15/A5 are don't
care, the LSB address bits A4/A0 define the byte address inside the Identification Page. The
number of bytes to read in the ID page must not exceed the page boundary (e.g.: when
reading the Identification Page from location 10d, the number of bytes should be less than
or equal to 22, as the ID page boundary is 32 bytes).
Read the lock status (M24C32-D only)
The locked/unlocked status of the Identification page can be checked by transmitting a
specific truncated command [Identification Page Write instruction + one data byte] to the
device. The device returns an acknowledge bit if the Identification page is unlocked,
otherwise a NoAck bit if the Identification page is locked.
Right after this, it is recommended to transmit to the device a Start condition followed by a
Stop condition, so that:
●
●
Start: the truncated command is not executed because the Start condition resets the
device internal logic,
Stop: the device is then set back into Standby mode by the Stop condition.
9, without acknowledging the byte.
Figure
9.
Doc ID 4578 Rev 21
Instructions
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