M95256-RMB6TG STMicroelectronics, M95256-RMB6TG Datasheet - Page 25

no-image

M95256-RMB6TG

Manufacturer Part Number
M95256-RMB6TG
Description
EEPROM 256 Kbit SPI EEPROM 20 MHz High Speed
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95256-RMB6TG

Product Category
EEPROM
Rohs
yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M95256-RMB6TG
Manufacturer:
ST
0
M95256-W M95256-R M95256-DR M95256-DF
6.6.1
Cycling with Error Correction Code (ECC)
M95256 and M95256-D devices offer an Error Correction Code (ECC) logic. The ECC is an
internal logic function which is transparent for the SPI communication protocol.
The ECC logic is implemented on each group of four EEPROM bytes
single bit out of the four bytes happens to be erroneous during a Read operation, the ECC
detects this bit and replaces it with the correct value. The read reliability is therefore much
improved.
Even if the ECC function is performed on groups of four bytes, a single byte can be
written/cycled independently. In this case, the ECC function also writes/cycles the three
other bytes located in the same group
defined at group level and the cycling can be distributed over the four bytes of the group: the
sum of the cycles seen by byte0, byte1, byte2 and byte3 of the same group must remain
below the maximum value defined in
c. A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where N is an integer.
Doc ID 12276 Rev 19
Table
(c)
. As a consequence, the maximum cycling budget is
14.
(c)
. Inside a group, if a
Instructions
25/53

Related parts for M95256-RMB6TG