M95256-RMB6TG STMicroelectronics, M95256-RMB6TG Datasheet - Page 28

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M95256-RMB6TG

Manufacturer Part Number
M95256-RMB6TG
Description
EEPROM 256 Kbit SPI EEPROM 20 MHz High Speed
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95256-RMB6TG

Product Category
EEPROM
Rohs
yes

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Instructions
6.9
Figure 17. Read Lock Status sequence
28/53
Read Lock Status (available only in M95256-D devices)
The Read Lock Status instruction (see
Page is locked or not in Read-only mode. The Read Lock Status sequence is defined with
the Chip Select (S) first driven low. The bits of the instruction byte and address bytes are
then shifted in on Serial Data Input (D). Address bit A10 must be 1, all other address bits are
Don't Care. The Lock bit is the LSB (least significant bit) of the byte read on Serial Data
Output (Q). It is at “1” when the lock is active and at “0” when the lock is not active. If Chip
Select (S) continues to be driven low, the same data byte is shifted out. The read cycle is
terminated by driving Chip Select (S) high.
The instruction sequence is shown in
Doc ID 12276 Rev 19
Figure
Table
M95256-W M95256-R M95256-DR M95256-DF
17.
4) is used to check whether the Identification

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