LFE3-35EA-7LFN484C Lattice, LFE3-35EA-7LFN484C Datasheet - Page 112

• Manufacturer Part Number: LFE3-35EA-7LFN484C
• Description: FPGA - Field Programmable Gate Array 33.3K LUTs 295 I/O 1.2V -7 SPEED
• Manufacturer: Lattice

Specifications of LFE3-35EA-7LFN484C

• Rohs: yes
• Number Of Gates: 33 K
• Number Of Logic Blocks: 72
• Embedded Block Ram - Ebr: 1327 Kbit
• Number Of I/os: 295
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: FPBGA-484
• Distributed Ram: 68 Kbit
• Minimum Operating Temperature: 0 C
• Operating Supply Current: 53.7 mA
• Factory Pack Quantity: 60

Switching Test Conditions
Figure 3-30 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 3-23.
Figure 3-30. Output Test Load, LVTTL and LVCMOS Standards
Table 3-23. Test Fixture Required Components, Non-Terminated Interfaces
LVTTL and other LVCMOS settings (L -> H, H -> L)
LVCMOS 2.5 I/O (Z -> H)
LVCMOS 2.5 I/O (Z -> L)
LVCMOS 2.5 I/O (H -> Z)
LVCMOS 2.5 I/O (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
*CL Includes Test Fixture and Probe Capacitance
DUT
V
R1
R2
T
1M
100
R



1
3-59
1M
100
R



CL*
2
Test Poi nt
0pF
0pF
0pF
0pF
0pF
C
DC and Switching Characteristics
L
LatticeECP3 Family Data Sheet
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
V
V
V
V
OH
OL
CCIO
CCIO
+ 0.10
- 0.10
/2
/2
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
CCIO
CCIO
V
—
—
—
—
—
—
—
T