LFE3-35EA-7LFN484C Lattice, LFE3-35EA-7LFN484C Datasheet - Page 53

• Manufacturer Part Number: LFE3-35EA-7LFN484C
• Description: FPGA - Field Programmable Gate Array 33.3K LUTs 295 I/O 1.2V -7 SPEED
• Manufacturer: Lattice

Specifications of LFE3-35EA-7LFN484C

• Rohs: yes
• Number Of Gates: 33 K
• Number Of Logic Blocks: 72
• Embedded Block Ram - Ebr: 1327 Kbit
• Number Of I/os: 295
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: FPBGA-484
• Distributed Ram: 68 Kbit
• Minimum Operating Temperature: 0 C
• Operating Supply Current: 53.7 mA
• Factory Pack Quantity: 60

Architecture
LatticeECP3 Family Data Sheet
Density Shifting
The LatticeECP3 family is designed to ensure that different density devices in the same family and in the same
package have the same pinout. Furthermore, the architecture ensures a high success rate when performing design
migration from lower density devices to higher density devices. In many cases, it is also possible to shift a lower uti-
lization design targeted for a high-density device to a lower density device. However, the exact details of the final
resource utilization will impact the likelihood of success in each case. An example is that some user I/Os may
become No Connects in smaller devices in the same package. Refer to the
LatticeECP3 Pin Migration Tables
and
Diamond software for specific restrictions and limitations.
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