PCI-MT32-XP-N1 Lattice, PCI-MT32-XP-N1 Datasheet - Page 152
PCI-MT32-XP-N1
Manufacturer Part Number
PCI-MT32-XP-N1
Description
FPGA - Field Programmable Gate Array PCI Master/Target 32B
Manufacturer
Lattice
Datasheet
1.PCI-MT32-O4-N2.pdf
(193 pages)
Specifications of PCI-MT32-XP-N1
Factory Pack Quantity
1
- Current page: 152 of 193
- Download datasheet (5Mb)
Lattice Semiconductor
IPUG18_09.2, November 2010
LatticeECP3
• HB1009, LatticeECP3 Family Handbook
LatticeSC/M
• DS1004, LatticeSC/M Family Data Sheet
LatticeXP
• HB1001, LatticeXP Family Handbook
LatticeXP2
• DS1009, Lattice XP2 Datasheet
MachXO
• DS1002, MachXO Family Datasheet
MachXO2
• DS1035, MachXO2 Family Datasheet
Revision History
September 2006
December 2006
November 2007
November 2010
August 2006
April 2007
May 2007
July 2008
July 2009
July 2010
Date
—
Document
Version
08.3
08.4
08.5
08.6
08.7
08.8
08.9
09.0
09.1
09.2
—
Version
5.2
5.2
5.2
5.2
5.2
5.2
5.2
6.1
6.1
6.2
6.4
IP
Previous Lattice releases.
Core version 5.2 - IPexpress User-Configurable flow supported for
LatticeECP/EC, LatticeECP2, LatticeSC, LatticeXP, and MachXO
only.
Added Parameter Descriptions section.
Updated appendices. Added LatticeECP2M appendix.
Updated references to PCI Local Bus Specification from revision
2.2 to revision 3.0.
Updated Command Register figure and table. Replaced “stepping
control” with “reserved bit”.
Updated BAR Mapped to Memory Space section.
Updated command9:0 signal description in the Local Interface
Signals table.
Added support for LatticeXP2 FPGA family.
Updated appendices.
Updated appendices.
Added support for LatticeECP3 FPGA family.
Divided document into chapters. Added table of contents.
Added Quick Facts table in
Added new content in
Added support for Diamond software throughout.
Added support for MachXO2 device family throughout.
152
Chapter 4,
Change Summary
Chapter
“IP Core Generation.”
1, “Introduction.”
PCI IP Core User’s Guide
Support Resources
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