LCMXO2-256ZE-2SG32IES Lattice, LCMXO2-256ZE-2SG32IES Datasheet - Page 69

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LCMXO2-256ZE-2SG32IES

Manufacturer Part Number
LCMXO2-256ZE-2SG32IES
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 1.2V engineering sample
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-256ZE-2SG32IES

Rohs
yes
Maximum Operating Frequency
125 MHz
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 40 C
Figure 3-9. GDDR71 Video Timing Waveforms
Figure 3-10. Receiver GDDR71_RX. Waveforms
Figure 3-11. Transmitter GDDR71_TX. Waveforms
756 Mbps
Clock In
125 MHz
Data Out
756 Mbps
Clock Out
125 MHz
t
t
t
DIA
DVA
DVE
0
0
1
1
2
2
3-30
3
3
4
4
5
5
DC and Switching Characteristics
6
6
MachXO2 Family Data Sheet
t
0
0
DIB

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