LCMXO2-256ZE-2SG32IES Lattice, LCMXO2-256ZE-2SG32IES Datasheet - Page 84

• Manufacturer Part Number: LCMXO2-256ZE-2SG32IES
• Description: FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 1.2V engineering sample
• Manufacturer: Lattice

Specifications of LCMXO2-256ZE-2SG32IES

• Rohs: yes
• Maximum Operating Frequency: 125 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 40 C

For Further Information
For further information regarding logic signal connections for various packages please refer to the MachXO2
Device Pinout Files.
Thermal Management
Thermal management is recommended as part of any sound FPGA design methodology. To assess the thermal
characteristics of a system, Lattice specifies a maximum allowable junction temperature in all device data sheets.
Users must complete a thermal analysis of their specific design to ensure that the device and package do not
exceed the junction temperature limits. Refer to the Thermal Management document to find the device/package
specific thermal values.
For Further Information
For further information regarding Thermal Management, refer to the following:
•
• TN1198,
• The Power Calculator tool is included with the Lattice design tools, or as a standalone download from
Thermal Management
www.latticesemi.com/software
Power Estimation and Management for MachXO2 Devices
document
4-8
MachXO2 Family Data Sheet
Pinout Information