LCMXO2-256ZE-2SG32IES Lattice, LCMXO2-256ZE-2SG32IES Datasheet - Page 76
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LCMXO2-256ZE-2SG32IES
Manufacturer Part Number
LCMXO2-256ZE-2SG32IES
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 1.2V engineering sample
Manufacturer
Lattice
Datasheet
1.LCMXO2-256HC-4SG32I.pdf
(106 pages)
Specifications of LCMXO2-256ZE-2SG32IES
Rohs
yes
Maximum Operating Frequency
125 MHz
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 40 C
- Current page: 76 of 106
- Download datasheet (8Mb)
Switching Test Conditions
Figure 3-13 shows the output test load used for AC testing. The specific values for resistance, capacitance, volt-
age, and other test conditions are shown in Table 3-5.
Figure 3-13. Output Test Load, LVTTL and LVCMOS Standards
Table 3-5. Test Fixture Required Components, Non-Terminated Interfaces
Note: Output test conditions for all other interfaces are determined by the respective standards.
LVTTL and LVCMOS settings (L -> H, H -> L)
LVTTL and LVCMOS 3.3 (Z -> H)
LVTTL and LVCMOS 3.3 (Z -> L)
Other LVCMOS (Z -> H)
Other LVCMOS (Z -> L)
LVTTL + LVCMOS (H -> Z)
LVTTL + LVCMOS (L -> Z)
Test Condition
DUT
188
R1
V
R1
T
3-37
0pF
0pF
CL
CL
LVTTL, LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
1.5
1.5
V
V
V
V
Test Poi n t
OH
OL
CCIO
CCIO
DC and Switching Characteristics
- 0.15
- 0.15
/2
/2
MachXO2 Family Data Sheet
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
V
V
V
V
VT
—
—
—
—
—
OH
OH
OH
OL
OL
OL
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