1894K-32LF IDT, 1894K-32LF Datasheet - Page 16

• Manufacturer Part Number: 1894K-32LF
• Description: Ethernet ICs 3.3V 10/100 PHY RMII
• Manufacturer: IDT

Specifications of 1894K-32LF

• Rohs: yes
• Part # Aliases: ICS1894K-32LF

Register Map
Register Description
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
0
1
2,3
4
5
6
7
8
9 through 15
16 through 31
Register 0 - Control
0.15
0.14
0.13
0.12
0.11
0.10
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Register Address
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
Bit
Reset
Loopback enable
Speed select
Auto-Negotiation enable
Low-power mode
Isolate
Auto-Negotiation restart
Duplex mode
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
Definition
—
1
Control
Status
PHY Identifier
Auto-Negotiation Advertisement
Auto-Negotiation Link Partner Ability
Auto-Negotiation Expansion
Auto-Negotiation Next Page Transmit
Auto-Negotiation Next Page Link Partner Ability
Reserved by IEEE
Vendor-Specific (IDT) Registers
1
No effect
10 Mbps operation
Disable Auto-Negotiation Enable Auto-Negotiation
Normal power mode
No effect
Half-duplex operation
mode not supported
Always 0
Always 0
Always 0
Always 0
Always 0
Always 0
Always 0
Disable Loopback mode
No effect
Register Name
When Bit = 0
—
Reset mode
Enable Loopback mode
100 Mbps operation
Low-power mode
Isolate from MII
Restart Auto-Negotiation
Full-duplex operation
N/A
N/A
N/A
N/A
N/A
N/A
N/A
When Bit = 1
—
16
Basic / Extended
Extended
Extended
Extended
Extended
Extended
Extended
Extended
Extended
Basic
Basic
Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
2
SF
SC
SC
–
–
–
–
–
–
–
–
–
–
–
–
–
–
ICS1894-32
2
Default
0/1‡
0†
0†
0†
0†
0†
0†
0†
0
0
1
1
0
0
1
0
PHYCEIVER
3
REV M 021512
1/5‡
Hex
3
0
0