1894K-32LF IDT, 1894K-32LF Datasheet - Page 34

• Manufacturer Part Number: 1894K-32LF
• Description: Ethernet ICs 3.3V 10/100 PHY RMII
• Manufacturer: IDT

Specifications of 1894K-32LF

• Rohs: yes
• Part # Aliases: ICS1894K-32LF

Timing for Transmit Clock (TXCLK) Pin
Transmit Clock Timing Diagram
Timing for Receive Clock (RXCLK) Pin
Receive Clock Timing Diagram
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
RXCLK
TXCLK
The table below lists the significant time periods for signals on the Transmit Clock (TXCLK) pin. The Transmit Clock
Timing Diagram figure shows the timing diagram for the time periods.
The table below lists the significant time periods for signals on the Receive Clock (RXCLK) pin. The Receive Clock
Timing Diagram figure shows the timing diagram for the time periods.
Period
Period
Time
Time
t2a
t2b
t2a
t2b
t1
t1
TXCLK Duty Cycle
TXCLK Period
TXCLK Period
RXCLK Duty Cycle
RXCLK Period
RXCLK Period
Parameter
Parameter
t1
t2
100M MII (100Base-TX)
100M MII (100Base-TX)
t1
10M MII (10Base-T)
10M MII (10Base-T)
Conditions
Conditions
t2x
–
–
34
Min. Typ. Max. Units
Min. Typ. Max.
35
–
–
35
–
–
400
50
40
400
40
50
ICS1894-32
65
–
–
65
–
–
PHYCEIVER
ns
ns
%
Units
REV M 021512
ns
ns
%