AT25DL081-MHN-Y Adesto Technologies, AT25DL081-MHN-Y Datasheet - Page 18
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AT25DL081-MHN-Y
Manufacturer Part Number
AT25DL081-MHN-Y
Description
Flash 8M 1.65-1.95V 100Mhz Serial Flash
Manufacturer
Adesto Technologies
Datasheet
1.AT25DL081-MHN-T.pdf
(59 pages)
Specifications of AT25DL081-MHN-Y
Rohs
yes
Data Bus Width
8 bit
Memory Type
Flash
Memory Size
8 Mbit
Architecture
Flexible, Uniform Erase
Timing Type
Synchronous
Interface Type
SPI
Supply Voltage - Max
1.95 V
Supply Voltage - Min
1.65 V
Maximum Operating Current
20 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
UDFN-8
8.5
Program/Erase Suspend
In some code-plus-data storage applications, it is often necessary to process certain high-level system interrupts that
require relatively immediate reading of code or data from the Flash memory. In such an instance, it may not be possible
for the system to wait the microseconds or milliseconds required for the Flash memory to complete a program or erase
cycle. The Program/Erase Suspend command allows a program or erase operation in progress on a particular 64KB
sector of the Flash memory array to be suspended so that other device operations can be performed.
By suspending an erase operation on a particular sector, the system can perform a program or read operation within
another 64KB sector of the device. Other device operations, such as a Read Status Register, can also be performed
while a program or erase operation is suspended.
Table 8-1
outlines the operations that are allowed and not allowed
while a program or erase operation is suspended.
Since the need to suspend a program or erase operation is immediate, the Write Enable command does not need to be
issued prior to the Program/Erase Suspend command being issued. Therefore, the Program/Erase Suspend command
operates independently of the state of the WEL bit in the Status Register.
To perform a Program/Erase Suspend, the CS pin must first be asserted and then the opcode B0h must be clocked into
the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will be
ignored. When the CS pin is deasserted, the program or erase operation currently in progress will be suspended within a
time of t
. The Program Suspend (PS) bit or the Erase Suspend (ES) bit in the Status Register will then be set to the
SUSP
Logical 1 state to indicate that the program or erase operation has been suspended. In addition, the RDY/BSY bit in the
Status Register will indicate that the device is ready for another operation. The complete opcode must be clocked into the
device before the CS pin is deasserted, and the CS pin must be deasserted on an even byte boundary (multiples of eight
bits); otherwise, no suspend operation will be performed.
Read operations are not allowed to a 64KB sector that has had its program or erase operation suspended. If a read is
attempted to a suspended sector, then the device will output undefined data. Therefore, if performing a Read Array
operation on an unsuspended sector, and if the device’s internal address counter increments and crosses the sector
boundary to a suspended sector, the device will then start outputting undefined data continuously until the address
counter increments and crosses a sector boundary to an unsuspended sector.
A program operation is not allowed on a sector that has been erase suspended. If a program operation is attempted on
an erase suspended sector, then the program operation will abort and the WEL bit in the Status Register will be reset
back to the Logical 0 state. Likewise, an erase operation is not allowed on a sector that has been program suspended. If
attempted, the erase operation will abort and the WEL bit in the Status Register will be reset to a Logical 0 state.
During an Erase Suspend, a program operation to a different 64KB sector can be started and subsequently suspended.
This results in a simultaneous Erase Suspend/Program Suspend condition, which will be indicated by the ES and PS bits
in the Status Register being set to the Logical 1 state.
If a Reset operation (see
“Reset” on page
41) is performed while a sector is erase suspended, the suspend operation will
abort and the contents of the block in the suspended sector will be left in an undefined state. However, if a Reset is
performed while a sector is program suspended, the suspend operation will abort, but only the contents of the page that
was being programmed and subsequently suspended will be undefined. The remaining pages in the 64KB sector will
retain their previous contents.
If an attempt is made to perform an operation that is not allowed while a program or erase operation is suspended, such
as a Protect Sector command, then the device will simply ignore the opcode and no operation will be performed. The
state of the WEL bit in the Status Register, as well as the SPRL (Sector Protection Registers Locked) and SLE (Sector
Lockdown Enabled) bits, will not be affected.
AT25DL081 [DATASHEET]
18
8732E–DFLASH–1/2013