NCN6010DTBR2 ON Semiconductor, NCN6010DTBR2 Datasheet - Page 9

• Manufacturer Part Number: NCN6010DTBR2
• Description: IC LEVEL SHIFTER SIMCARD 14TSSOP
• Manufacturer: ON Semiconductor

Specifications of NCN6010DTBR2

• Logic Function: Level Shifter
• Input Type: Logic
• Output Type: Logic
• Differential - Input:output: No/No
• Propagation Delay (max): 50ns
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -25°C ~ 85°C
• Package / Case: 14-TSSOP
• Supply Voltage: 2.7 V ~ 3.6 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Channels: -
• Data Rate: -
• Other names: NCN6010DTBR2OSTR

Level Shifters
the MPU V
reprogrammed to cope with the expected output voltage.
When the MPU and the SIM card operate under the same
supply voltage, the DC-DC converter is not activated
(SIM_VCC = V
through the level shifters.
accelerator operates. During the first 200 ns (typical), the
slope of the rise time is solely a function of the pull up
resistor associated with the stray capacitance. During this
period, the PMOS devices are not activated since the input
voltage is below their Vgs threshold. When the input slope
When the SIM card voltage is either higher or lower than
The typical waveform provided in Figure 7 shows how the
DD
DD
supply, the level shifters can be
–50 mV) and the signals go directly
V
I/O
DD
20 k
IO/CONTROL
Figure 5. Power Down Sequence Oscillogram
Q1
Figure 6. Basic I/O Line Interface
200 ns
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NCN6010
LOGIC
9
automatically adapt the voltage difference between the mCU
and the SIM card. In addition with the pull up resistor, an
active pull up circuit (Figure 6 Q1 and Q2) provides a fast
charge of the stray capacitance, yielding a rise time fully
within the ISO/EMV specifications.
crosses the Vgsth, the opposite one shot is activated,
providing a low impedance to charge the capacitance, thus
increasing the rise time as depicted in Figure 7. The same
mechanism applies for the opposite side of the line to make
sure the system is optimum.
GND
The bi-directional I/O line provides a way to
200 ns
Q2
GND
Q3
20 k
SIM_IO
V
CC