SC16IS762IBS-F NXP Semiconductors, SC16IS762IBS-F Datasheet - Page 17
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SC16IS762IBS-F
Manufacturer Part Number
SC16IS762IBS-F
Description
UART Interface IC I2C/SPI-UARTBRIDGE W/IRDA AND GPIO
Manufacturer
NXP Semiconductors
Type
RS-232 or RS-485 or IrDAr
Datasheet
1.SC16IS762IBS.pdf
(60 pages)
Specifications of SC16IS762IBS-F
Product Category
UART Interface IC
Rohs
yes
Number Of Channels
2
Data Rate
5 Mbps
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.3 V
Supply Current
6 mA
Maximum Operating Temperature
+ 95 C
Minimum Operating Temperature
- 40 C
Package / Case
HVQFN-32
Mounting Style
SMD/SMT
Operating Supply Voltage
2.5 V, 3.3 V
Factory Pack Quantity
1500
Part # Aliases
SC16IS762IBS,128
NXP Semiconductors
SC16IS752_SC16IS762
Product data sheet
Figure 10
DLL and DLH must be written to in order to program the baud rate. DLL and DLH are the
least significant and most significant byte of the baud rate divisor. If DLL and DLH are both
zero, the UART is effectively disabled, as no baud clock will be generated.
Remark: The programmable baud rate generator is provided to select both the transmit
and receive clock rates.
Table 7
1.8432 MHz and 3.072 MHz, respectively.
Figure 11
Table 7.
Desired baud rate
(bit/s)
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
56000
Fig 10. Prescaler and baud rate generator block diagram
XTAL1
XTAL2
and
shows the crystal clock circuit reference.
shows the internal prescaler and baud rate generator circuitry.
Baud rates using a 1.8432 MHz crystal
Table 8
OSCILLATOR
All information provided in this document is subject to legal disclaimers.
INTERNAL
LOGIC
show the baud rate and divisor correlation for crystal with frequency
Dual UART with I
Rev. 9 — 22 March 2012
Divisor used to generate
16 clock
2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
6
3
2
input clock
(DIVIDE-BY-1)
(DIVIDE-BY-4)
PRESCALER
PRESCALER
LOGIC
LOGIC
SC16IS752; SC16IS762
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
MCR[7] = 0
MCR[7] = 1
reference
clock
Percent error difference
between desired and actual
0
0
0.026
0.058
0
0
0
0
0
0.69
0
0
0
0
0
0
0
2.86
GENERATOR
BAUD RATE
LOGIC
© NXP B.V. 2012. All rights reserved.
002aaa233
internal
baud rate
clock for
transmitter
and receiver
17 of 60