SC16IS762IBS-F NXP Semiconductors, SC16IS762IBS-F Datasheet - Page 9

• Manufacturer Part Number: SC16IS762IBS-F
• Description: UART Interface IC I2C/SPI-UARTBRIDGE W/IRDA AND GPIO
• Manufacturer: NXP Semiconductors
• Type: RS-232 or RS-485 or IrDAr

Specifications of SC16IS762IBS-F

• Product Category: UART Interface IC
• Rohs: yes
• Number Of Channels: 2
• Data Rate: 5 Mbps
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 95 C
• Minimum Operating Temperature: - 40 C
• Package / Case: HVQFN-32
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Factory Pack Quantity: 1500
• Part # Aliases: SC16IS762IBS,128

NXP Semiconductors
SC16IS752_SC16IS762
Product data sheet
Fig 5.
(1) N = receiver FIFO trigger level.
(2) The two blocks in dashed lines cover the case where an additional character is sent, as described in
RTS functional timing
receive
FIFO
RTS
read
RX
7.2.1 Auto-RTS
Figure 5
are stored in the TCR. RTS is active if the RX FIFO level is below the halt trigger level in
TCR[3:0]. When the receiver FIFO halt trigger level is reached, RTS is de-asserted. The
sending device (for example, another UART) may send an additional character after the
trigger level is reached (assuming the sending UART has another character to send)
because it may not recognize the de-assertion of RTS until it has begun sending the
additional character. RTS is automatically reasserted once the receiver FIFO reaches the
resume trigger level programmed via TCR[7:4]. This re-assertion allows the sending
device to resume transmission.
start
Fig 4.
character
shows RTS functional timing. The receiver FIFO trigger levels used in Auto-RTS
N
Auto flow control (Auto-RTS and Auto-CTS) example
FIFO
FIFO
RX
TX
All information provided in this document is subject to legal disclaimers.
stop
UART 1
SERIAL TO
TO SERIAL
Dual UART with I
PARALLEL
PARALLEL
CONTROL
CONTROL
Rev. 9 — 22 March 2012
FLOW
FLOW
start
character
N + 1
1
RTS
CTS
RX
TX
SC16IS752; SC16IS762
2
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
stop
TX
CTS
RX
RTS
SERIAL TO
TO SERIAL
PARALLEL
N
PARALLEL
CONTROL
CONTROL
FLOW
FLOW
UART 2
N + 1
Section
© NXP B.V. 2012. All rights reserved.
002aab040
start
7.2.1.
FIFO
FIFO
RX
TX
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