C8051T326-GMR Silicon Labs, C8051T326-GMR Datasheet - Page 28
![no-image](/images/no-image-200.jpg)
C8051T326-GMR
Manufacturer Part Number
C8051T326-GMR
Description
8-bit Microcontrollers - MCU USB-OTP-16K-QFN28
Manufacturer
Silicon Labs
Datasheet
1.C8051T322-GQR.pdf
(292 pages)
Specifications of C8051T326-GMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
- Current page: 28 of 292
- Download datasheet (2Mb)
C8051T620/621/320/321/322/323
28
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all pads.
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
C1
C2
E
mask and the metal pad is to be 60 m minimum, all the way around the pad.
to assure good solder paste release.
Body Components.
Figure 4.2. LQFP-32 Recommended PCB Land Pattern
Table 4.2. LQFP-32 PCB Land Pattern Dimensions
8.40
8.40
Min
0.80
Max
8.50
8.50
Rev. 1.1
Dimension
X1
Y1
0.40
1.25
Min
Max
0.50
1.35
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