C8051F303-GSR Silicon Labs, C8051F303-GSR Datasheet - Page 27
![no-image](/images/no-image-200.jpg)
C8051F303-GSR
Manufacturer Part Number
C8051F303-GSR
Description
8-bit Microcontrollers - MCU 8KB 14Pin MCU
Manufacturer
Silicon Labs
Datasheet
1.C8051F301-GSR.pdf
(178 pages)
Specifications of C8051F303-GSR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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4.
N.C. pins for F30x GP packages: 4, 9, 11
CNVSTR
XTAL1 /
XTAL2 /
VREF /
C2CK /
Name
P0.6 /
C2D /
GND
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.7
RST
V
DD
Pinout and Package Definitions
F300/1/2/3/4/5
GM
Pin
10
11
1
2
3
4
5
6
7
8
9
Table 4.1. Pin Definitions for the C8051F300/1/2/3/4/5
F300/1/2/3/4/5
Pin
GP
10
12
13
14
5
6
7
8
1
2
3
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
A Out
D I/O
D I/O
D I/O
D I/O
Type
D I/O
A In
A In
A In
A In
A In
A In
A In
A In
A In
Rev. 2.9
External Voltage Reference Input.
Port 0.0. See
Port 0.1. See
Power Supply Voltage.
Crystal Input. This pin is the external oscillator cir-
cuit return for a crystal or ceramic resonator. See
Section
Port 0.2. See
Crystal Input/Output. For an external crystal or res-
onator, this pin is the excitation driver. This pin is
the external clock input for CMOS, capacitor, or RC
network configurations. See
Port 0.3. See
Port 0.4. See
Port 0.5. See
Clock signal for the C2 Development Interface.
Device Reset. Open-drain output of internal POR or
V
tem reset by driving this pin low for at least 10 µs.
Port 0.6. See
ADC External Convert Start Input Strobe.
Data signal for the C2 Development Interface.
Port 0.7. See
Ground.
DD
monitor. An external source can initiate a sys-
11.2.
C8051F300/1/2/3/4/5
Section 12
Section 12
Section 12
Section 12
Section 12
Section 12
Section 12
Section 12
Description
for complete description.
for complete description.
for complete description.
for complete description.
for complete description.
for complete description.
for complete description.
for complete description.
Section
11.2.
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