EL5120TIWTZ-T7 Intersil, EL5120TIWTZ-T7 Datasheet - Page 12

• Manufacturer Part Number: EL5120TIWTZ-T7
• Description: Operational Amplifiers - Op Amps 12MHz Rail to Rail Op Amp IC
• Manufacturer: Intersil

Specifications of EL5120TIWTZ-T7

• Rohs: yes
• Number Of Channels: 1
• Common Mode Rejection Ratio (min): 75 dB
• Input Offset Voltage: 5 mV
• Input Bias Current (max): 50 nA
• Operating Supply Voltage: 4.5 V to 19 V
• Mounting Style: SMD/SMT
• Package / Case: TSOT-5
• Slew Rate: 12 V/us
• Shutdown: No
• Output Current: 200 mA
• Maximum Operating Temperature: + 85 C
• Gain Bandwidth Product: 8 MHz
• Supply Current: 750 uA

Driving Capacitive Loads
Purely capacitive loads on the EL5120T should not exceed 1nF
without appropriate output load isolation or amplifier
compensation techniques.
As load capacitance increases, the -3dB bandwidth will decrease
and peaking can occur. Depending on the application, it may be
necessary to reduce peaking and to improve device stability. To
improve device stability, a snubber circuit (compensation) or a
series resistor (isolation) may be added to the output of the
EL5120T.
A snubber is a shunt load consisting of a resistor in series with a
capacitor. An optimized snubber can improve the phase margin
and the stability of the EL5120T. The advantage of a snubber
circuit is that it does not draw any DC load current or reduce the
gain.
Another method to reduce peaking is to add a series output
resistor (typically between 1Ω to 10Ω). Depending on the
capacitive loading, a small value resistor may be the most
appropriate choice to minimize any reduction in gain.
Power Dissipation
With the high-output drive capability of the EL5120T amplifier, it
is possible to exceed the +150°C absolute maximum junction
temperature under certain load current conditions. It is
important to calculate the maximum power dissipation of the
EL5120T in the application. Proper load conditions will ensure
that the EL5120T junction temperature stays within a safe
operating region.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
where:
• T
• T
• Θ
• P
The total power dissipation produced by an IC is the total
quiescent supply current times the total power supply voltage,
plus the power dissipation in the IC due to the load, or:
P
when sourcing, and:
P
when sinking,
where:
• V
• V
• V
• I
P
DMAX
DMAX
DMAX
(I
SMAX
JMAX
AMAX
S
S
S
SMAX
DMAX
JA
+ = Positive supply voltage
- = Negative supply voltage
= Total supply voltage (
= Thermal resistance of the package
=
=
=
= Maximum junction temperature
= Maximum supply current
= Maximum ambient temperature
= EL5120T quiescent current)
= Maximum power dissipation allowed
V
V
T
-------------------------------------------- -
S
S
JMAX
×
×
I
I
SMAX
SMAX
θ
–
JA
T
AMAX
+
+
(
(
V
V
S
OUT
+ V
V
–
S
12
+ - V
–
OUT
V
S
S
- )
-
)
)
×
×
I
I
LOAD
LOAD
(EQ. 1)
(EQ. 2)
(EQ. 3)
EL5120T
• V
• I
Device overheating can be avoided by calculating the minimum
resistive load condition, R
dissipation. To find R
each other and solve for V
power dissipation curves, Figures 30 and 31, for further
information.
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT
LOAD
OUT
0.8
0.6
0.4
0.2
0.0
0.6
0.5
0.4
0.3
0.2
0.1
0.0
= Output voltage
0
= Load current
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY (4-LAYER) TEST BOARD - EXPOSED DIEPAD
SOLDERED TO PCB PER JESD51-5
0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
417mW
581mW
TEMPERATURE
TEMPERATURE
25
25
LOAD
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
LOAD
50
OUT
50
set the two P
/I
, resulting in the highest power
LOAD
θ
θ
JA
JA
75
75
= +300°C/W
TSOT5
= +215°C/W
TSOT5
. Reference the package
85
85
DMAX
100
100
equations equal to
September 27, 2012
125
125
FN6895.0
150
150