74AUP2G3404GF,125 NXP Semiconductors, 74AUP2G3404GF,125 Datasheet - Page 10

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74AUP2G3404GF,125

Manufacturer Part Number
74AUP2G3404GF,125
Description
Buffers & Line Drivers Lo-Pwr buffer & inverter
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP2G3404GF,125

Rohs
yes
Number Of Input Lines
2
Number Of Output Lines
2
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.1 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
XSON-6
Logic Family
AUP
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
1
Output Type
CMOS
Propagation Delay Time
11.4 ns
Supply Current
0.5 uA
NXP Semiconductors
Table 11.
[1]
74AUP2G3404
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 8.
CC
For measuring enable and disable times, R
R
L
= 1 M.
C
R
V
Test circuit for measuring switching times
Test data is given in
Definitions for test circuit:
R
L
L
T
EXT
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
= External voltage for measuring switching times.
Load
C
5 pF, 10 pF, 15 pF and 30 pF 5 k or 1 M
L
Table
11.
All information provided in this document is subject to legal disclaimers.
L
G
= 5 k. For measuring propagation delays, set-up and hold times, and pulse width,
V I
Rev. 1 — 22 August 2012
R T
R
DUT
L
V
[1]
CC
V O
C L
o
001aac521
of the pulse generator.
V
V
t
open
PLH
EXT
EXT
5 kΩ
R L
, t
PHL
Low-power buffer and inverter
74AUP2G3404
t
GND
PZH
, t
PHZ
© NXP B.V. 2012. All rights reserved.
t
2  V
PZL
, t
CC
PLZ
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