74HC138D-Q100,118 NXP Semiconductors, 74HC138D-Q100,118 Datasheet

74HC138D-Q100,118

Manufacturer Part Number

74HC138D-Q100,118

Description

Encoders, Decoders, Multiplexers & Demultiplexers

Manufacturer

NXP Semiconductors

Datasheet

1.74HC138D-Q100118.pdf (18 pages)

Specifications of 74HC138D-Q100,118

Rohs

yes

Product

Decoders / Demultiplexers

Logic Family

74HC

Propagation Delay Time

225 ns

Supply Voltage - Max

6 V

Supply Voltage - Min

2 V

Maximum Operating Temperature

+ 125 C

Mounting Style

SMD/SMT

Package / Case

SO-16

Minimum Operating Temperature

- 40 C

Operating Temperature Range

- 40 C to + 125 C

Operating Voltage

2 V to 6 V

Power Dissipation

500 mW

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1. General description

2. Features and benefits

The 74HC138-Q100; 74HCT138-Q100 is a high-speed Si-gate CMOS device and is pin

compatible with Low-power Schottky TTL (LSTTL).

The 74HC138-Q100; 74HCT138-Q100 decoder accepts three binary weighted address

inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW

outputs (Y0 to Y7).

The 74HC138-Q100; 74HCT138-Q100 features three enable inputs: two active LOW

(E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are

LOW and E3 is HIGH.

This multiple enable function allows easy parallel expansion of the 74HC138-Q100;

74HCT138-Q100 to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138-Q100;

74HCT138-Q100 ICs and one inverter.

The 74HC138-Q100; 74HCT138-Q100 can be used as an eight output demultiplexer by

using one of the active LOW enable inputs as the data input and the remaining enable

inputs as strobes. Not used enable inputs must be permanently tied to their appropriate

active HIGH- or LOW-state.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.



74HC138-Q100; 74HCT138-Q100

3-to-8 line decoder/demultiplexer; inverting

Rev. 1 — 16 July 2012

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Demultiplexing capability

Multiple input enable for easy expansion

Complies with JEDEC standard no. 7A

Ideal for memory chip select decoding

Active LOW mutually exclusive outputs

ESD protection:

Multiple package options



Specified from 40 C to +85 C and from 40 C to +125 C

MIL-STD-883, method 3015 exceeds 2000 V

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

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