NTS0101GW,125 NXP Semiconductors, NTS0101GW,125 Datasheet - Page 14

• Manufacturer Part Number: NTS0101GW,125
• Description: Translation - Voltage Levels XLATE REC 6.5V 250mW
• Manufacturer: NXP Semiconductors

Specifications of NTS0101GW,125

• Rohs: yes
• Supply Voltage - Max: + 6.5 V
• Supply Voltage - Min: - 0.5 V
• Maximum Operating Temperature: + 125 C
• Package / Case: SC-88
• Maximum Power Dissipation: 250 mW
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 3000

NXP Semiconductors
NTS0101
Product data sheet
14.3 Input driver requirements
14.4 Output load considerations
14.5 Power-up
14.6 Enable and disable
The gate bias voltage of the pass gate transistor (T3) is set at approximately one
threshold voltage above the V
transition, the output one-shot accelerates the output transition by switching on the PMOS
transistors (T1, T2). This bypasses the 10 k pull-up resistors and increases the current
drive capability. The one-shot is activated once the input transition reaches approximately
V
acceleration time, the driver output resistance is between approximately 50  and 70 .
To avoid signal contention and minimize dynamic I
turn-off before applying a signal in the opposite direction. Pull-up resistors are included in
the device for DC current sourcing capability.
As the NTS0101 is a switch type translator, properties of the input driver directly affect the
output signal. The external open-drain or push-pull driver applied to an I/O, determines
the static current sinking capability of the system. The maximum data rate, HIGH-to-LOW
output transition time (t
impedance and edge-rate of the external driver. The limits provided for these parameters
in the data sheet assume a driver with output impedance below 50  is used.
The maximum lumped capacitive load that can be driven, is dependant upon the one-shot
pulse duration. In cases with very heavy capacitive loading, there is a risk that the output
does not reach the positive rail within the one-shot pulse duration.
To avoid excessive capacitive loading and to ensure correct triggering of the one-shot, it is
recommended to use short trace lengths and low capacitance connectors on NTS0101
PCB layouts. To ensure low impedance termination and avoid output signal oscillations
and one-shot retriggering, the length of the PCB trace should be such that the round-trip
delay of any reflection is within the one-shot pulse duration (approximately 50 ns).
During operation V
V
first. There is no special power-up sequencing required. The NTS0101 includes circuitry
that disables all output ports when either V
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all
I/Os to assume the high-impedance OFF-state. The disable time (t
load) indicates the delay between when OE goes LOW and when outputs actually
become disabled. The enable time (t
one-shot circuitry to become operational after OE is taken HIGH. To ensure the
high-impedance OFF-state during power-up or power-down, tie pin OE to GND through a
pull-down resistor. The minimum value of the resistor is determined by the
current-sourcing capability of the driver.
CCI
CC(A)
/2; it is de-activated approximately 50 ns after the output reaches V
 V
CC(B)
Dual supply translating transceiver; open drain; auto direction sensing
does not damage the device, so either power supply can be ramped up
All information provided in this document is subject to legal disclaimers.
CC(A)
Rev. 4 — 4 September 2012
THL
must never be higher than V
) and propagation delay (t
CC
level of the low-voltage side. During a LOW-to-HIGH
en
) indicates the amount of time to allow for one
CC(A)
or V
CC
PHL
CC(B)
CC(B)
, wait for the one-shot circuit to
) are dependent upon the output
, however during power-up
is switched off.
dis
with no external
NTS0101
© NXP B.V. 2012. All rights reserved.
CCO
/2. During the
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