AT24C01BN-SH-B Atmel, AT24C01BN-SH-B Datasheet - Page 6

• Manufacturer Part Number: AT24C01BN-SH-B
• Description: IC EEPROM 1KBIT 1MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT24C01BN-SH-B

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 1K (128 x 8)
• Speed: 400kHz, 1MHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Organization: 128 K x 8
• Interface Type: 2-Wire
• Maximum Clock Frequency: 1 MHz
• Access Time: 550 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V, 5.5 V
• Memory Configuration: 128 X 8
• Clock Frequency: 1MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Device Operation
6
AT24C01B
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-
nal device. Data on the SDA pin may change only during SCL low time periods (see
Figure 4 on page 7). Data changes during SCL high periods will indicate a start or stop
condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition
which must precede any other command (see Figure 5 on page 8).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.
After a read sequence, the stop command will place the EEPROM in a standby power
mode (see Figure 5 on page 8).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from
the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has
received each word. This happens during the ninth clock cycle.
STANDBY MODE: The AT24C01B features a low-power standby mode which is
enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the completion
of any internal operations.
2-WIRE SOFTWARE RESET: After an interruption in protocol, power loss or system
reset, any 2-wire part can be protocol reset by following these steps: (a) Create a start
bit condition, (b) Clock 9 cycles, (c) Create another start bit followed by a stop bit condi-
tion as shown below. The device is ready for next communication after above steps
have been completed.
SCL
SDA
Start Bit
1
2
Dummy Clock Cycles
3
8
9
Start Bit
5156C–SEEPR–4/07
Stop Bit