DS3508E+T&R/C Maxim Integrated, DS3508E+T&R/C Datasheet - Page 13

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DS3508E+T&R/C

Manufacturer Part Number
DS3508E+T&R/C
Description
LCD Gamma Buffers I2C 8Ch Gamma Buffer w/EEPROM
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS3508E+T&R/C

Rohs
yes
Factory Pack Quantity
2500
Part # Aliases
90-3508F+C00
Figure 5. I
byte before terminating the transaction. After the master
reads the last byte it must NACK to indicate the end of
the transfer and generates a STOP condition.
Manipulating the address counter for reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master gen-
erates a START condition, writes the slave address
byte (R/W = 0), writes the memory address where it
desires to read, generates a repeated START condi-
tion, writes the slave address byte (R/W = 1), reads
data with ACK or NACK as applicable, and generates a
STOP condition. The master must NACK the last byte to
inform the slave that no additional bytes are to be read.
To achieve the best results when using the DS3508,
decouple both power-supply pins (V
0.01µF or 0.1µF capacitor. Use a high-quality ceramic
surface-mount capacitor if possible. Surface-mount
A)
B)
C)
TYPICAL I
EXAMPLE I
D)
START
SINGLE-BYTE WRITE
-WRITE CR REGISTER TO 80h
SINGLE-BYTE READ
-READ GM3
TWO-BYTE WRITE
- WRITE GM1 AND GM2 TO 80h
TWO-BYTE READ
- READ GM1 AND GM2
2
C WRITE TRANSACTION
2
MSB
C TRANSACTIONS (WHEN A0 IS CONNECTED TO GND)
1
2
C Communication Examples
I
1
2
C, 8-Channel Gamma Buffer with EEPROM
1
ADDRESS*
Applications Information
SLAVE
0
______________________________________________________________________________________
1
START
START
START 1 1 1 0 1 0 0 0
START 1 1 1 0 1 0 0 0
Power-Supply Decoupling
0
1 1 1 0 1 0 0 0
1 1 1 0 1 0 0 0
A0
READ/
WRITE
E8h
E8h
E8h
E8h
LSB
R/W
SLAVE
ACK
CC
SLAVE
SLAVE
SLAVE
SLAVE
ACK
ACK
ACK
ACK
MSB
and V
b7
0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
b6
08h
02h
00h
00h
DD
b5
REGISTER ADDRESS
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PIN A0.
) with a
b4
SLAVE
SLAVE
SLAVE
SLAVE
ACK
ACK
ACK
ACK
b3
1 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0
REPEATED
REPEATED
b2
START
START
80h
80h
b1
(For the latest package outline information, go to
www.maxim-ic.com/DallasPackInfo.)
components minimize lead inductance, which improves
performance, and ceramic capacitors tend to have
adequate high-frequency response for decoupling
applications.
SDA is an I/O with an open-collector output that
requires a pullup resistor to realize high-logic levels. A
master using either an open-collector output with a
pullup resistor or a push-pull output driver can be used
for SCL. Pullup resistor values should be chosen to
ensure that the rise and fall times listed in the electrical
characteristics are within specification. A typical value
for the pullup resistors is 4.7kΩ.
PACKAGE TYPE
1 1 1 0 1 0 0 1
b0
LSB
1 1 1 0 1 0 0 1
SLAVE
20 TSSOP
SLAVE
ACK
ACK
E9h
E9h
SLAVE
ACK
STOP
1 0 0 0 0 0 0 0
MSB
b7
SLAVE
ACK
80h
SLAVE
ACK
b6
SDA and SCL Pullup Resistors
b5
PACKAGE CODE
DATA
GM3
SLAVE
ACK
Package Information
DATA
GM1
b4
DATA
b3
STOP
MASTER
NACK
MASTER
b2
ACK
b1
STOP
LSB
b0
DATA
GM2
DOCUMENT NO.
SLAVE
56-G2010-000
ACK
MASTER
NACK
STOP
STOP
13

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