DS3508E+T&R/C Maxim Integrated, DS3508E+T&R/C Datasheet - Page 7

• Manufacturer Part Number: DS3508E+T&R/C
• Description: LCD Gamma Buffers I2C 8Ch Gamma Buffer w/EEPROM
• Manufacturer: Maxim Integrated

Specifications of DS3508E+T&R/C

• Rohs: yes
• Factory Pack Quantity: 2500
• Part # Aliases: 90-3508F+C00

The DS3508 provides eight independent DACs that
allow precise and repeatable setting of gamma curves.
The DS3508 provides four high-voltage DACs
(GM1–GM4) that operate between VHH and VHM and
four low-voltage DACs (GM5–GM8) that operate
between VLM and VLL. Each of the DACs provides 8
bits of resolution.
The DS3508 DAC output voltages are independently
controlled by the data stored in that channel’s SRAM
register. The MODE bit in the volatile control register
(CR bit 7) determines how I
SRAM and EEPROM gamma data registers. Reading
and writing to the SRAM/EEPROM gamma data regis-
ters is based on the state of the MODE bit as follows:
10, 11
PIN
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
I
2
C, 8-Channel Gamma Buffer with EEPROM
NAME
GND
GM8
GM7
GM6
GM5
GM4
GM3
GM2
GM1
VHH
VHM
SDA
VLM
N.C.
SCL
V
V
VLL
A0
DD
CC
_______________________________________________________________________________________
Detailed Description
Reference
Reference
Reference
Reference
Ground
Output
Output
Output
Power
Power
TYPE
Input/
Input
Input
Input
Input
Input
Input
—
2
C data is written to the
Serial Clock Input. I
Serial Data Input/Output (Open Drain). I
resistor to realize high logic levels.
Ground
Address Input. Determines I
High-Voltage DAC, Upper Reference
High-Voltage DAC, Lower Reference
Low-Voltage DAC, Upper Reference
Low-Voltage DAC, Lower Reference
Analog Supply
No Connection
Gamma Analog Outputs 5–8. These pins are the low-voltage gamma outputs
referenced to VLL and VLM.
Gamma Analog Outputs 1–4. These pins are the high-voltage gamma outputs
referenced to VHH and VHM.
Digital Supply
2
C clock input.
Regardless of the MODE bit setting, all I
address 00–07h return the contents of the SRAM regis-
ters. Setting MODE = 1 allows for quick writing of SRAM
without the added delay of writing to the associated
EEPROM register. The data that is stored in EEPROM and
SRAM remains unchanged if the MODE bit is toggled.
2
C slave address.
MODE = 0:
MODE = 1:
FUNCTION
2
C bidirectional data pin that requires a pullup
I
00h–07h write to both SRAM 1–8 and
EEPROM 1–8.
I
read from SRAM 1–8.
I
to SRAM 1–8.
I
read from SRAM 1–8.
2
2
2
2
C writes to addresses 00h–07h write
C reads from addresses 00h–07h
C reads from addresses 00h–07h
C writes to memory addresses
Pin Description
2
C reads of
7