72V3644L10PF IDT, 72V3644L10PF Datasheet - Page 24

• Manufacturer Part Number: 72V3644L10PF
• Description: FIFO
• Manufacturer: IDT

Specifications of 72V3644L10PF

• Part # Aliases: IDT72V3644L10PF

NOTES:
1. t
2. If Port B size is word or byte, EFB is set LOW by the last word or byte read from FIFO1, respectively.
IDT72V3624/72V3634/72V3644 3.3V CMOS SyncBiFIFO
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
A0-A35
B0-B35
CLKA
CLKB edge is less than t
W/RA
CLKB
W/RB
SKEW1
MBA
MBB
CSA
ENA
CSB
ENB
EFB
FFA
is the minimum time between a rising CLKA edge and a rising CLKB edge for EFB to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge and rising
FIFO1 Empty
HIGH
LOW
LOW
LOW
HIGH
HIGH
Figure 16. EFB
SKEW1
t
t
ENS2
ENS2
t
DS
, then the transition of EFB HIGH may occur one CLKB cycle later than shown.
EFB
EFB
EFB
EFB Flag Timing and First Data Read Fall Through when FIFO1 is Empty (IDT Standard Mode)
W1
t
SKEW1
t
t
t
ENH
ENH
DH
(1)
t
CLKH
1
t
CLK
TM
t
CLKL
WITH BUS-MATCHING
24
t
2
REF
t
CLKH
t
ENS2
t
CLK
t
CLKL
t
REF
t
A
t
ENH
COMMERCIAL TEMPERATURE RANGE
W1
4664 drw18