74AUP1G240GW-G NXP Semiconductors, 74AUP1G240GW-G Datasheet - Page 11
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74AUP1G240GW-G
Manufacturer Part Number
74AUP1G240GW-G
Description
Buffers & Line Drivers 3V SINGLE BUF/LD INV 3S
Manufacturer
NXP Semiconductors
Datasheet
1.74AUP1G240GW-G.pdf
(23 pages)
Specifications of 74AUP1G240GW-G
Product Category
Buffers & Line Drivers
Rohs
yes
Number Of Input Lines
1
Number Of Output Lines
1
Polarity
Inverting
Supply Voltage - Max
3.6 V
Supply Voltage - Min
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UMT-5
High Level Output Current
- 4 mA
Logic Family
AUP
Logic Type
CMOS
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
1
Output Type
3-State
Propagation Delay Time
21.6 ns at 1.1 V to 1.3 V, 12.3 ns at 1.4 V to 1.6 V, 9.5 ns at 1.65 V to 1.95 V, 7.1 ns at 2.3 V to 2.7 V, 6.4 ns at 3 V to 3.6 V
Factory Pack Quantity
3000
Part # Aliases
74AUP1G240GW,125
NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
[4]
[5]
12. Waveforms
Table 9.
74AUP1G240
Product data sheet
Symbol Parameter
C
C
Supply voltage
V
0.8 V to 3.6 V
Fig 8.
CC
L
PD
= 5 pF, 10 pF, 15 pF and 30 pF
All typical values are measured at nominal V
t
t
t
C
P
f
f
C
V
N = number of inputs switching;
(C
pd
en
dis
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
is the same as t
= output load capacitance in pF;
= C
is the same as t
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
V
power dissipation
capacitance
Measurement points are given in
Logic levels: V
The data input (A) to output (Y) propagation delays
PD
Dynamic characteristics
Measurement points
CC
V
2
f
CC
o
2
) = sum of the outputs.
f
PLH
PZH
PHZ
i
N + (C
OL
and t
and t
and t
and V
PHL
PZL
PLZ
Output
V
0.5 V
Conditions
f
V
i
OH
L
M
I
= 1 MHz;
V
V
V
V
V
V
V
= GND to V
are typical output voltage drop that occur with the output load.
CC
CC
CC
CC
CC
CC
CC
Y output
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
CC
A input
2
…continued
f
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
CC
CC
GND
9.
V
V
.
OH
OL
V
I
Rev. 4 — 29 June 2012
Input
V
0.5 V
M
V
D
M
in W).
V
[5]
CC
M
t
PHL
Min
Figure 10
-
-
-
-
-
-
Low-power inverting buffer/line driver; 3-state
25 C
Typ
2.7
2.9
3.0
3.2
3.7
4.2
[1]
V
V
I
CC
mna640
t
Max
PLH
-
-
-
-
-
-
Min
-
-
-
-
-
-
74AUP1G240
40 C to +125 C
(85 C)
Max
t
3.0 ns
-
-
-
-
-
-
r
= t
© NXP B.V. 2012. All rights reserved.
f
(125 C)
Max
-
-
-
-
-
-
11 of 23
Unit
pF
pF
pF
pF
pF
pF