XRT59L91ES Exar, XRT59L91ES Datasheet - Page 3

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XRT59L91ES

Manufacturer Part Number
XRT59L91ES
Description
Peripheral Drivers & Components - PCIs 1 CH E1 AFE
Manufacturer
Exar
Datasheet

Specifications of XRT59L91ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
PIN CONFIGURATION
PIN DESCRIPTION
Pin#
1
2
Rev. 1.0.0
Symbol
TxPOS
TxClk
Type
R xN E G
T xN E G
R xP O S
T xP O S
R xL O S
R L o op
I
I
L L oo p
T xC lk
Description
Transmitter Clock Input:
If the user operates the LIU in the “clocked” mode, then the “Transmit
Section” of the LIU will use the falling edge of this signal to sample the
data at the TxPOS and TxNEG input pins.
Note: If the user operates the LIU in the “clockless” mode, then the
Terminal Equipment should not apply a clock signal to this input pin.
Transmit – Positive Data Input:
The exact signal that should be applied to this input pin depends upon
whether the user intends to operate the “Transmit Section” (of the device)
in the “Clocked” or “Clockless” Mode.
Clocked Mode -
The Terminal Equipment should apply bit-wide NRZ pulses on this input
pin, whenever the Terminal Equipment needs to transmit a “positive-
polarity” pulse onto the line via TTIP and TRing output pins. The
XRT59L91 device will sample this input pin upon the falling edge of the
TCLK signal.
The Terminal Equipment should apply RZ pulses to this input pin,
anytime the Terminal Equipment needs to transmit a “positive-polarity”
pulse onto the line via TTIP and TRing output pins.
Clockless Mode -
8
1
3
1 6
9
T V S S
T R in g
T V D D
T T IP
R V D D
R V S S
R R ing
R T IP
XRT59L91

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