MAX9972ACCS+DW Maxim Integrated, MAX9972ACCS+DW Datasheet - Page 17

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MAX9972ACCS+DW

Manufacturer Part Number
MAX9972ACCS+DW
Description
Buffers & Line Drivers
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX9972ACCS+DW

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The MAX9972 is a four-channel, pin-electronics IC for
automated test equipment that includes, for each chan-
nel, a three-level pin driver, a window comparator, a
passive load, and a Kelvin instrument connection
(Figure 1). All functions feature a -2.2V to +5.2V operat-
ing range and the drivers include both high-impedance
and active-termination (3rd-level drive) modes. The
comparators feature programmable output voltages,
allowing optimization for different CMOS interface stan-
dards. The loads have selectable output resistance for
optimizing DUT current loading. The Kelvin paths allow
accurate connection of an instrument with ±25mA
source/sink capability. Additionally, the MAX9972 offers
a low-leakage mode that reduces DUT_ leakage cur-
rent to less than 20nA.
Each of the four channels feature single-ended CMOS-
compatible inputs, DATA_ and RCV_, for control of the
driver signal path (Figure 2). The MAX9972 modal
operation is programmed through a 3-wire, low-voltage
CMOS-compatible serial interface.
The driver input is a high-speed multiplexer that selects
one of three voltage inputs: DHV_, DLV_, or DTV_. This
switching is controlled by high-speed inputs DATA_ and
RCV_, and mode-control bit TERM (Table 1). DATA_
and RCV_ are single-ended inputs with threshold levels
equal to V
pendently generated to minimize crosstalk.
DUT_ can be toggled at high speed between the buffer
output and high-impedance mode, or it can be placed
into low-leakage mode (Figure 2, Table 1). High-speed
input RCV_ and mode-control bits TERM and LLEAK
control these modes. In high-impedance mode, the
bias current at DUT_ is less than 2µA over the -2.2V to
+5.2V range, while the node maintains its ability to
track high-speed signals. In low-leakage mode, the
bias current at DUT_ is further reduced to less than
20nA, and signal tracking slows.
L
/2. Each channel’s threshold levels are inde-
______________________________________________________________________________________
Detailed Description
Quad, Ultra-Low-Power, 300Mbps ATE
Output Driver
The nominal driver output resistance is 50Ω. Custom
resistance values from 45Ω to 51Ω are possible; con-
sult factory for further information.
Table 1. Driver Channel Control Signals
Figure 2. Multiplexer and Driver Channel
C O NN EC TIO N S
RCV_ DATA_
DATA_
DHV_
RCV_
DTV_
DLV_
EXTER N AL
0
0
1
1
X
Drivers/Comparators
0
1
TERM
X
X
X
0
1
0
1
TERM
CONTROL BITS
X
X
0
1
X
INTERNAL
HIGH
IMPEDANCE
LLEAK
BUFFER
0
0
0
0
1
LLEAK
0
DUT_ = DHV_
DUT_ = DLV_
DUT_ = DTV_ Receive
Impedance
MAX9972
Low Leak
OUTPUT
DRIVER
High
COMPARATORS
AND LOAD
50Ω
Leakage
DRIVER
Receive
MODE
Drive
Drive
Low
DUT_
17

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