MAX1366ECM-T Maxim Integrated, MAX1366ECM-T Datasheet - Page 24

• Manufacturer Part Number: MAX1366ECM-T
• Description: LED Display Drivers
• Manufacturer: Maxim Integrated

Specifications of MAX1366ECM-T

• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C

Microcontroller-Interface, 4.5-/3.5-Digit Panel
Meters with 4–20mA Output
START: Start bit. The first 1 clocked into the MAX1366/
MAX1368 is the first bit of the command byte.
(R/W): Read/Write. Set this bit to 1 to read from the
specified register. Set this bit to zero to write to the
selected register. Note that certain registers are read
Default values: 00h
This register contains the status of the conversion
results.
SIGN: Latched negative-polarity indicator. Latches high
when the result is negative. Clears by reading the sta-
tus register, unless the condition remains true.
OVER: Overrange bit. Latches high if an overrange
condition occurs (the ADC result is larger than the
value in the overrange register). Clears by reading the
status register, unless the condition remains true.
UNDER: Underrange bit. Latches high if an underrange
condition occurs (the ADC result is less than the
Default values: 0000h
This register is the primary control register for the
MAX1366/MAX1368. It is a 16-bit read/write register. It
is used to indicate the desired clock and reference
source. It sets the LED display controls, range modes,
power-down modes, offset calibration, and the reset
register function (CLR).
Command Byte (Write Only)
24
Status Register (Read Only)
Control Register (Read/Write)
START(1)
SPI/ADC
______________________________________________________________________________________
SIGN
MSB
HOLD
Bit 15
MSB
MSB
Bit 7
Bit 7
EXTCLK
OVER
Bit 14
PEAK
Bit 6
Bit 6
R/W
INTREF
RANGE
UNDER
Bit 13
Bit 5
Bit 5
RS4
LOW_BATT
DPON
Bit 12
Bit 4
CLR
Bit 4
RS3
only. Write commands to a read-only register are
ignored.
(RS4–RS0): Register address bits. RS4 to RS0 specify
which register is accessed.
X: Don’t care.
value in the underrange register). Clears by reading the
status register, unless the condition remains true.
LOW_BATT: Low-battery bit. Latches high if the volt-
age at the LOWBATT is lower than 2.048V (typ). Clears
by reading the status register, unless the condition
remains true.
DRDY: Data-ready bit. Latches high to indicate a com-
pleted conversion result with valid data. Read the ADC
result register to clear this bit.
SEG_SEL
ENABLE: (Default = 1.) LED driver enable bit. When set
to 1, the MAX1366/MAX1368 enables the LED display
drivers. A 0 in this location disables the LED dis-
play drivers.
OFFSET_CAL2: (Default = 0.) Enhanced offset-calibra-
tion start bit (RANGE = 1). To achieve the lowest possi-
ble offset in the ±200mV input range, perform an
enhanced offset calibration by setting this bit to 1. The
calibration takes about nine cycles (1800ms). After the
calibration completes, set this bit to zero to resume
ADC conversions.
DPSET2
Bit 11
DRDY
Bit 3
Bit 3
RS2
OFFSET_CAL1
DPSET1
Bit 10
Bit 2
Bit 2
Control and Status Registers
RS1
0
OFFSET_
PD_DIG
Bit 1
RS0
CAL2
0
Bit 9
Bit 1
LSB
PD_ANA
ENABLE
LSB
Bit 0
LSB
0
Bit 8
Bit 0
X